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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-25 11:40:00 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-11 08:57:41 +0100
commita6ac1877316216c8c56a9ab04b9ac3cde6ab01aa (patch)
tree68b39f9c23f7c6bd9ac19c2daa75f58ae057f1e8 /src/southbridge/intel
parent823020d56be1bf6425b4e433a1f1c2bbc2c4c90b (diff)
downloadcoreboot-a6ac1877316216c8c56a9ab04b9ac3cde6ab01aa.tar.xz
intel/gm45: Use romstage_handoff for S3
Don't use scratchpad registers when we have romstage_handoff to pass S3 resume flag. Also fixes console log from reporting early in ramstage "Normal boot" while on S3 resume path. Change-Id: I4e2eabc59ff87b7ed40cfc9885bbe0256fe4a695 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17674 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.h4
-rw-r--r--src/southbridge/intel/i82801ix/smi.c13
2 files changed, 2 insertions, 15 deletions
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h
index afe4aa7064..af4efcdb30 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.h
+++ b/src/southbridge/intel/i82801ix/i82801ix.h
@@ -218,10 +218,6 @@
#define FD_SAD1 (1 << 2) /* SATA #1 */
-#define SKPAD_ACPI_S3_MAGIC 0xcafed00d
-#define SKPAD_NORMAL_BOOT_MAGIC 0xcafebabe
-
-
#ifndef __ACPI__
#ifndef __ASSEMBLER__
diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c
index 421746df7e..a6c28cbbc2 100644
--- a/src/southbridge/intel/i82801ix/smi.c
+++ b/src/southbridge/intel/i82801ix/smi.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
@@ -312,16 +313,6 @@ static void smm_relocate(void)
static int smm_handler_copied = 0;
-static int is_wakeup(void)
-{
- device_t dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
-
- if (!dev0)
- return 0;
-
- return pci_read_config32(dev0, 0xdc) == SKPAD_ACPI_S3_MAGIC;
-}
-
static void smm_install(void)
{
/* The first CPU running this gets to copy the SMM handler. But not all
@@ -335,7 +326,7 @@ static void smm_install(void)
/* if we're resuming from S3, the SMM code is already in place,
* so don't copy it again to keep the current SMM state */
- if (!is_wakeup()) {
+ if (!acpi_is_wakeup_s3()) {
/* enable the SMM memory window */
pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
D_OPEN | G_SMRAME | C_BASE_SEG);