sb/intel/common: Add SOUTHBRIDGE_INTEL_COMMON_SPI

This introduces a Kconfig option to include common Intel SPI code.

Change-Id: I970408e5656c0e8812b8609e2cc10d0bc8d8f6f2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/21674
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

14 files changed, 15 insertions, 17 deletions

diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index e3772bab01..fe1ca3480b 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -26,6 +26,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select SOUTHBRIDGE_INTEL_COMMON
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
+	select SOUTHBRIDGE_INTEL_COMMON_SPI
 	select IOAPIC
 	select HAVE_HARD_RESET
 	select HAVE_USBDEBUG_OPTIONS
@@ -33,7 +34,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select USE_WATCHDOG_ON_BOOT
 	select PCIEXP_ASPM
 	select PCIEXP_COMMON_CLOCK
-	select SPI_FLASH
 	select COMMON_FADT
 	select ACPI_SATA_GENERATOR
 	select HAVE_INTEL_FIRMWARE
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index 8e882681ce..a5825a8a22 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -35,8 +35,6 @@ ramstage-y += reset.c
 ramstage-y += watchdog.c
 
 ramstage-$(CONFIG_ELOG) += elog.c
-ramstage-y += ../common/spi.c
-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c
 
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig
index 304ecbfba3..6ce6b33579 100644
--- a/src/southbridge/intel/common/Kconfig
+++ b/src/southbridge/intel/common/Kconfig
@@ -8,6 +8,10 @@ config SOUTHBRIDGE_INTEL_COMMON_SMBUS
 	def_bool n
 	select HAVE_DEBUG_SMBUS
 
+config SOUTHBRIDGE_INTEL_COMMON_SPI
+	def_bool n
+	select SPI_FLASH
+
 config HAVE_INTEL_CHIPSET_LOCKDOWN
 	def_bool n
 
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 5810394bcb..0128505d66 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -28,4 +28,9 @@ smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
 romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
 ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
 
+ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
+ifeq ($(CONFIG_SPI_FLASH_SMM),y)
+smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
+endif
+
 endif
diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig
index 08400b354f..877a335545 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Kconfig
+++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig
@@ -28,11 +28,11 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select USE_WATCHDOG_ON_BOOT
 	select PCIEXP_ASPM
 	select PCIEXP_COMMON_CLOCK
-	select SPI_FLASH
 	select COMMON_FADT
 	select HAVE_INTEL_FIRMWARE
 	select SOUTHBRIDGE_INTEL_COMMON
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
+	select SOUTHBRIDGE_INTEL_COMMON_SPI
 	select HAVE_INTEL_CHIPSET_LOCKDOWN
 
 config EHCI_BAR
diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
index 265633c8d5..93253e94ef 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
@@ -27,8 +27,6 @@ ramstage-y += reset.c
 ramstage-y += watchdog.c
 
 ramstage-$(CONFIG_ELOG) += elog.c
-ramstage-y += ../common/spi.c
-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c
 
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c
diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig
index 67c2665e66..d0cb45c250 100644
--- a/src/southbridge/intel/fsp_i89xx/Kconfig
+++ b/src/southbridge/intel/fsp_i89xx/Kconfig
@@ -28,12 +28,12 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select USE_WATCHDOG_ON_BOOT
 	select PCIEXP_ASPM
 	select PCIEXP_COMMON_CLOCK
-	select SPI_FLASH
 	select COMMON_FADT
 	select HAVE_INTEL_FIRMWARE
 	select NO_EARLY_BOOTBLOCK_POSTCODES
 	select SOUTHBRIDGE_INTEL_COMMON
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
+	select SOUTHBRIDGE_INTEL_COMMON_SPI
 
 config EHCI_BAR
 	hex
diff --git a/src/southbridge/intel/fsp_i89xx/Makefile.inc b/src/southbridge/intel/fsp_i89xx/Makefile.inc
index f9bbdc6d6d..d8eb06789f 100644
--- a/src/southbridge/intel/fsp_i89xx/Makefile.inc
+++ b/src/southbridge/intel/fsp_i89xx/Makefile.inc
@@ -26,8 +26,6 @@ ramstage-y += reset.c
 ramstage-y += watchdog.c
 
 ramstage-$(CONFIG_ELOG) += elog.c
-ramstage-y += ../common/spi.c
-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c
 
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index fd7579ac31..9fd19ed324 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -23,9 +23,9 @@ config SOUTHBRIDGE_INTEL_I82801GX
 	select USE_WATCHDOG_ON_BOOT
 	select HAVE_SMI_HANDLER
 	select COMMON_FADT
-	select SPI_FLASH
 	select SOUTHBRIDGE_INTEL_COMMON_GPIO
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
+	select SOUTHBRIDGE_INTEL_COMMON_SPI
 
 if SOUTHBRIDGE_INTEL_I82801GX
 
diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc
index 5b3ba6ae0a..bb68d933b6 100644
--- a/src/southbridge/intel/i82801gx/Makefile.inc
+++ b/src/southbridge/intel/i82801gx/Makefile.inc
@@ -27,7 +27,6 @@ ramstage-y += sata.c
 ramstage-y += smbus.c
 ramstage-y += usb.c
 ramstage-y += usb_ehci.c
-ramstage-y += ../common/spi.c
 
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
 
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index 4b78118e4d..60af933094 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -28,9 +28,9 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select USE_WATCHDOG_ON_BOOT
 	select PCIEXP_ASPM
 	select PCIEXP_COMMON_CLOCK
-	select SPI_FLASH
 	select SOUTHBRIDGE_INTEL_COMMON
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
+	select SOUTHBRIDGE_INTEL_COMMON_SPI
 	select HAVE_USBDEBUG_OPTIONS
 	select COMMON_FADT
 	select ACPI_SATA_GENERATOR
diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc
index 41d3afbecd..7714f9578a 100644
--- a/src/southbridge/intel/ibexpeak/Makefile.inc
+++ b/src/southbridge/intel/ibexpeak/Makefile.inc
@@ -35,9 +35,7 @@ ramstage-y += ../bd82x6x/reset.c
 ramstage-y += ../bd82x6x/watchdog.c
 
 ramstage-$(CONFIG_ELOG) += ../bd82x6x/elog.c
-ramstage-y += ../common/spi.c
 ramstage-y += madt.c
-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c
 
 ramstage-y += smi.c
 smm-y += smihandler.c me.c ../bd82x6x/me_8.x.c ../bd82x6x/finalize.c ../bd82x6x/pch.c
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 646d480dd8..8d5cbbf227 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -23,13 +23,13 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select SOUTHBRIDGE_INTEL_COMMON
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
+	select SOUTHBRIDGE_INTEL_COMMON_SPI
 	select IOAPIC
 	select HAVE_HARD_RESET
 	select HAVE_USBDEBUG_OPTIONS
 	select USE_WATCHDOG_ON_BOOT
 	select PCIEXP_ASPM
 	select PCIEXP_COMMON_CLOCK
-	select SPI_FLASH
 	select HAVE_INTEL_FIRMWARE
 	select HAVE_SPI_CONSOLE_SUPPORT
 	select RTC
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
index 3b1ce5a461..6abdf4d191 100644
--- a/src/southbridge/intel/lynxpoint/Makefile.inc
+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
@@ -41,8 +41,6 @@ ramstage-y += watchdog.c
 ramstage-y += acpi.c
 
 ramstage-$(CONFIG_ELOG) += elog.c
-ramstage-y += ../common/spi.c
-smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c
 
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c pmutil.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c pch.c