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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-03-21 11:10:03 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-04-06 16:09:12 +0000 |
| commit | bf0970e762a6611cef06af761bc2dec068d439bb (patch) | |
| tree | 44d4854b7027794bc5a76b44a4e8fd07935cd60c /src/southbridge/intel | |
| parent | 161eafb0fb9563decbb953d5dccac4762b770e0c (diff) | |
| download | coreboot-bf0970e762a6611cef06af761bc2dec068d439bb.tar.xz | |
src: Use include <delay.h> when appropriate
Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: David Guckian
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch.c | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/soc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/azalia.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smihandler.c | 4 |
4 files changed, 5 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 23942feffb..88436213a0 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -18,12 +18,11 @@ #include <arch/cbfs.h> #include <ip_checksum.h> #include <device/pci_def.h> -#include <delay.h> - -#include "pch.h" /* For DMI bar. */ #include <northbridge/intel/sandybridge/sandybridge.h> +#include "pch.h" + #define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0) static void diff --git a/src/southbridge/intel/fsp_rangeley/soc.c b/src/southbridge/intel/fsp_rangeley/soc.c index ec5cd073ed..ec66c430a9 100644 --- a/src/southbridge/intel/fsp_rangeley/soc.c +++ b/src/southbridge/intel/fsp_rangeley/soc.c @@ -17,10 +17,10 @@ */ #include <console/console.h> -#include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> + #include "soc.h" static int soc_revision_id = -1; diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c index 2deb92976e..cb1c190b39 100644 --- a/src/southbridge/intel/lynxpoint/azalia.c +++ b/src/southbridge/intel/lynxpoint/azalia.c @@ -21,8 +21,8 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <delay.h> #include <device/azalia_device.h> + #include "pch.h" #include "hda_verb.h" diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index bfa112a807..88c599f782 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <delay.h> #include <types.h> #include <arch/io.h> #include <device/pci_ops.h> @@ -29,12 +28,11 @@ #include <southbridge/intel/common/finalize.h> #include <northbridge/intel/haswell/haswell.h> #include <cpu/intel/haswell/haswell.h> + #include "me.h" #include "pch.h" - #include "nvs.h" - static u8 smm_initialized = 0; /* GNVS needs to be updated by an 0xEA PM Trap (B2) after it has been located |