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| author | Patrick Rudolph <siro@das-labor.org> | 2017-05-22 19:06:28 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-02 18:51:40 +0200 |
| commit | f4835a85c0e851d13bcfed53a23f495caeefe8e2 (patch) | |
| tree | 2de4ff6f109ca9c2b9319a647bc4a88810e3b50e /src/southbridge/intel | |
| parent | a6909f88e95e1ba48e84207f146c9f9a01c7dd32 (diff) | |
| download | coreboot-f4835a85c0e851d13bcfed53a23f495caeefe8e2.tar.xz | |
sb/intel/bd82x6x: Disable unused bridges
Disable unused bridges that are not marked as hot-plugable.
Reduces idle power consumtion by ~200mWatt for each port.
Tested on Lenovo T430.
Change-Id: I6ee5e5f33824acdbca0f6ed28e90beab7fe10002
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19818
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pcie.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c index 91add02d7c..627b6f7431 100644 --- a/src/southbridge/intel/bd82x6x/pcie.c +++ b/src/southbridge/intel/bd82x6x/pcie.c @@ -269,6 +269,14 @@ static void pch_pcie_enable(device_t dev) pch_pcie_pm_early(dev); } +static void pch_pcie_disable(device_t dev) +{ + dev->enabled = 0; + + /* Let PCH hide the device */ + pch_enable(dev); +} + static void pch_pciexp_scan_bridge(device_t dev) { struct southbridge_intel_bd82x6x_config *config = dev->chip_info; @@ -278,6 +286,11 @@ static void pch_pciexp_scan_bridge(device_t dev) if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) { intel_acpi_pcie_hotplug_scan_slot(dev->link_list); + } else { + if (!dev_is_active_bridge(dev)) { + dev->ops->disable(dev); + return; + } } /* Late Power Management init after bridge device enumeration */ @@ -305,6 +318,7 @@ static struct device_operations device_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_bus_enable_resources, .init = pci_init, + .disable = pch_pcie_disable, .enable = pch_pcie_enable, .scan_bus = pch_pciexp_scan_bridge, .ops_pci = &pci_ops, |