coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3

a long time ago. This will make it easier to port v2 boards forward to v3 at
some point (and other things)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

13 files changed, 33 insertions, 33 deletions

diff --git a/src/southbridge/intel/esb6300/esb6300.c b/src/southbridge/intel/esb6300/esb6300.c
index 11110191f7..786daea23b 100644
--- a/src/southbridge/intel/esb6300/esb6300.c
+++ b/src/southbridge/intel/esb6300/esb6300.c
@@ -12,11 +12,11 @@ void esb6300_enable(device_t dev)
 
 	/* See if we are on the behind the 6300 pci bridge */
 	lpc_dev = dev_find_slot(dev->bus->secondary, PCI_DEVFN(0x1f, 0));
-	if((dev->path.u.pci.devfn &0xf8)== 0xf8) {
-		index = dev->path.u.pci.devfn & 7;
+	if((dev->path.pci.devfn &0xf8)== 0xf8) {
+		index = dev->path.pci.devfn & 7;
 	}
-	else if((dev->path.u.pci.devfn &0xf8)== 0xe8) {
-		index = (dev->path.u.pci.devfn & 7) +8;
+	else if((dev->path.pci.devfn &0xf8)== 0xe8) {
+		index = (dev->path.pci.devfn & 7) +8;
 	}
 	if ((!lpc_dev) || (index >= 16) || ((1<<index)&0x3091)) {
 		return;
diff --git a/src/southbridge/intel/esb6300/esb6300_smbus.c b/src/southbridge/intel/esb6300/esb6300_smbus.c
index c202a3008e..3aa507070d 100644
--- a/src/southbridge/intel/esb6300/esb6300_smbus.c
+++ b/src/southbridge/intel/esb6300/esb6300_smbus.c
@@ -13,7 +13,7 @@ static int lsmbus_read_byte(struct bus *bus, device_t dev, uint8_t address)
 	unsigned device;
 	struct resource *res;
 
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
 	res = find_resource(bus->dev, 0x20);
 	
 	return do_smbus_read_byte(res->base, device, address);
diff --git a/src/southbridge/intel/i3100/i3100.c b/src/southbridge/intel/i3100/i3100.c
index 2d08b42d0d..69ee7bd058 100644
--- a/src/southbridge/intel/i3100/i3100.c
+++ b/src/southbridge/intel/i3100/i3100.c
@@ -41,8 +41,8 @@ void i3100_enable(device_t dev)
 	lpc_dev = dev_find_slot(0x0, PCI_DEVFN(0x1f, 0x0));
 	pci_write_config32(lpc_dev, 0xf0, 0xa0000000 | (1 << 0));
 	disable = (volatile u32 *) 0xa0003418;
-	func = PCI_FUNC(dev->path.u.pci.devfn);
-	switch (PCI_SLOT(dev->path.u.pci.devfn)) {
+	func = PCI_FUNC(dev->path.pci.devfn);
+	switch (PCI_SLOT(dev->path.pci.devfn)) {
 	case 0x1f: /* LPC (fn0), SATA (fn2), SMBus (fn3) */
 		*disable |= (1 << (func == 0x0 ? 14 : func));
 		break;
diff --git a/src/southbridge/intel/i3100/i3100_smbus.c b/src/southbridge/intel/i3100/i3100_smbus.c
index 5b24acdcf2..14853d56bf 100644
--- a/src/southbridge/intel/i3100/i3100_smbus.c
+++ b/src/southbridge/intel/i3100/i3100_smbus.c
@@ -34,7 +34,7 @@ static int lsmbus_read_byte(device_t dev, u8 address)
 	struct resource *res;
 	struct bus *pbus;
 
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
 	pbus = get_pbus_smbus(dev);
 	res = find_resource(pbus->dev, 0x20);
 
diff --git a/src/southbridge/intel/i82801ca/i82801ca.c b/src/southbridge/intel/i82801ca/i82801ca.c
index f416e363d4..23a64f7104 100644
--- a/src/southbridge/intel/i82801ca/i82801ca.c
+++ b/src/southbridge/intel/i82801ca/i82801ca.c
@@ -22,16 +22,16 @@ void i82801ca_enable(device_t dev)
 	//		 D31:F1, D31:F3, D31:F5, D31:F6, 
 	//		 D29:F0, D29:F1, D29:F2
 
-    if (PCI_SLOT(dev->path.u.pci.devfn) == 31) {
-    	index = PCI_FUNC(dev->path.u.pci.devfn);
+    if (PCI_SLOT(dev->path.pci.devfn) == 31) {
+    	index = PCI_FUNC(dev->path.pci.devfn);
 
 		if ((index == 1) || (index == 3) || (index == 5) || (index == 6))
 			bHasDisableBit = 1;
 
-    } else if (PCI_SLOT(dev->path.u.pci.devfn) == 29) {
-    	index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
+    } else if (PCI_SLOT(dev->path.pci.devfn) == 29) {
+    	index = 8 + PCI_FUNC(dev->path.pci.devfn);
 
-		if (PCI_FUNC(dev->path.u.pci.devfn) < 3)
+		if (PCI_FUNC(dev->path.pci.devfn) < 3)
 			bHasDisableBit = 1;
     }
 
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm.c b/src/southbridge/intel/i82801dbm/i82801dbm.c
index 160b897dc2..157ffcac1e 100644
--- a/src/southbridge/intel/i82801dbm/i82801dbm.c
+++ b/src/southbridge/intel/i82801dbm/i82801dbm.c
@@ -21,8 +21,8 @@ void i82801dbm_enable(device_t dev)
 	//		 D31: F0, F1, F3, F5, F6, 
 	//		 D29: F0, F1, F2, F7
 
-    if (PCI_SLOT(dev->path.u.pci.devfn) == 31) {
-    	index = PCI_FUNC(dev->path.u.pci.devfn);
+    if (PCI_SLOT(dev->path.pci.devfn) == 31) {
+    	index = PCI_FUNC(dev->path.pci.devfn);
 
 		switch (index) {
 			case 0:
@@ -40,10 +40,10 @@ void i82801dbm_enable(device_t dev)
 		if (index == 0)
 			index = 14;		// D31:F0 bit is an exception
 
-    } else if (PCI_SLOT(dev->path.u.pci.devfn) == 29) {
-    	index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
+    } else if (PCI_SLOT(dev->path.pci.devfn) == 29) {
+    	index = 8 + PCI_FUNC(dev->path.pci.devfn);
 
-		if ((PCI_FUNC(dev->path.u.pci.devfn) < 3) || (PCI_FUNC(dev->path.u.pci.devfn) == 7))
+		if ((PCI_FUNC(dev->path.pci.devfn) < 3) || (PCI_FUNC(dev->path.pci.devfn) == 7))
 			bHasDisableBit = 1;
     }
 
diff --git a/src/southbridge/intel/i82801er/i82801er.c b/src/southbridge/intel/i82801er/i82801er.c
index 6738a52104..19b0666cdb 100644
--- a/src/southbridge/intel/i82801er/i82801er.c
+++ b/src/southbridge/intel/i82801er/i82801er.c
@@ -12,11 +12,11 @@ void i82801er_enable(device_t dev)
 
 	/* See if we are behind the i82801er pci bridge */
 	lpc_dev = dev_find_slot(dev->bus->secondary, PCI_DEVFN(0x1f, 0));
-	if((dev->path.u.pci.devfn &0xf8)== 0xf8) {
-		index = dev->path.u.pci.devfn & 7;
+	if((dev->path.pci.devfn &0xf8)== 0xf8) {
+		index = dev->path.pci.devfn & 7;
 	}
-	else if((dev->path.u.pci.devfn &0xf8)== 0xe8) {
-		index = (dev->path.u.pci.devfn & 7) +8;
+	else if((dev->path.pci.devfn &0xf8)== 0xe8) {
+		index = (dev->path.pci.devfn & 7) +8;
 	}
 	if ((!lpc_dev) || (index >= 16) || ((1<<index)&0x3091)) {
 		return;
diff --git a/src/southbridge/intel/i82801er/i82801er_smbus.c b/src/southbridge/intel/i82801er/i82801er_smbus.c
index 23980c939a..ee32c697a7 100644
--- a/src/southbridge/intel/i82801er/i82801er_smbus.c
+++ b/src/southbridge/intel/i82801er/i82801er_smbus.c
@@ -13,7 +13,7 @@ static int lsmbus_read_byte(struct bus *bus, device_t dev, uint8_t address)
 	unsigned device;
 	struct resource *res;
 
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
 	res = find_resource(bus->dev, 0x20);
 	
 	return do_smbus_read_byte(res->base, device, address);
diff --git a/src/southbridge/intel/i82801gx/i82801gx_smbus.c b/src/southbridge/intel/i82801gx/i82801gx_smbus.c
index 45bc0164e0..bc14cc39f2 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_smbus.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_smbus.c
@@ -31,7 +31,7 @@ static int smbus_read_byte(struct bus *bus, device_t dev, u8 address)
 	u16 device;
 	struct resource *res;
 
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
 	res = find_resource(bus->dev, 0x20);
 
 	return do_smbus_read_byte(res->base, device, address);
diff --git a/src/southbridge/intel/i82801xx/i82801xx.c b/src/southbridge/intel/i82801xx/i82801xx.c
index ec025fd921..385b122d47 100644
--- a/src/southbridge/intel/i82801xx/i82801xx.c
+++ b/src/southbridge/intel/i82801xx/i82801xx.c
@@ -40,10 +40,10 @@ void i82801xx_enable(device_t dev)
 	 * exists it can be disabled. Workarounds for ICH variants that don't
 	 * follow this should be done by checking the device ID.
 	 */
-	if (PCI_SLOT(dev->path.u.pci.devfn) == 31) {
-		index = PCI_FUNC(dev->path.u.pci.devfn);
-	} else if (PCI_SLOT(dev->path.u.pci.devfn) == 29) {
-		index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
+	if (PCI_SLOT(dev->path.pci.devfn) == 31) {
+		index = PCI_FUNC(dev->path.pci.devfn);
+	} else if (PCI_SLOT(dev->path.pci.devfn) == 29) {
+		index = 8 + PCI_FUNC(dev->path.pci.devfn);
 	}
 
 	/* Function 0 is a bit of an exception. */
diff --git a/src/southbridge/intel/i82801xx/i82801xx_smbus.c b/src/southbridge/intel/i82801xx/i82801xx_smbus.c
index af2a139456..2173104949 100644
--- a/src/southbridge/intel/i82801xx/i82801xx_smbus.c
+++ b/src/southbridge/intel/i82801xx/i82801xx_smbus.c
@@ -32,7 +32,7 @@ static int smbus_read_byte(struct bus *bus, device_t dev, u8 address)
 	unsigned device;	/* TODO: u16? */
 	struct resource *res;
 
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
 	res = find_resource(bus->dev, 0x20);
 
 	return do_smbus_read_byte(res->base, device, address);
diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c
index ce37d122e7..0fa74ffcf3 100644
--- a/src/southbridge/intel/i82870/p64h2_ioapic.c
+++ b/src/southbridge/intel/i82870/p64h2_ioapic.c
@@ -63,8 +63,8 @@ static void p64h2_ioapic_init(device_t dev)
     pWindowRegister = (volatile uint32_t*)(memoryBase + 0x10);
 
     printk_debug("IOAPIC %d at %02x:%02x.%01x  MBAR = %x DataAddr = %x\n",
-                 apic_id, dev->bus->secondary, PCI_SLOT(dev->path.u.pci.devfn), 
-                 PCI_FUNC(dev->path.u.pci.devfn), pIndexRegister, pWindowRegister);
+                 apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), 
+                 PCI_FUNC(dev->path.pci.devfn), pIndexRegister, pWindowRegister);
 
     apic_id <<= 24;             // Convert ID to bitmask
 
diff --git a/src/southbridge/intel/pxhd/pxhd_bridge.c b/src/southbridge/intel/pxhd/pxhd_bridge.c
index d185159b43..5913063606 100644
--- a/src/southbridge/intel/pxhd/pxhd_bridge.c
+++ b/src/southbridge/intel/pxhd/pxhd_bridge.c
@@ -15,11 +15,11 @@ static void pxhd_enable(device_t dev)
 {
 	device_t bridge;
 	uint16_t value;
-	if ((dev->path.u.pci.devfn & 1) == 0) {
+	if ((dev->path.pci.devfn & 1) == 0) {
 		/* Can we enable/disable the bridges? */
 	  	return;
 	}
-	bridge = dev_find_slot(dev->bus->secondary, dev->path.u.pci.devfn & ~1);
+	bridge = dev_find_slot(dev->bus->secondary, dev->path.pci.devfn & ~1);
 	if (!bridge) {
 		printk_err("Cannot find bridge for ioapic: %s\n",
 			   dev_path(dev));