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authorSven Schnelle <svens@stackframe.org>2011-06-14 20:55:54 +0200
committerSven Schnelle <svens@stackframe.org>2011-06-15 23:11:44 +0200
commitbfe8e5186ea9916634d31182ec0437f6175e7724 (patch)
treec47d6e948425e4bbe0d9c38cc2a1eb1a954070a9 /src/southbridge/intel
parentb629d14becd78c634ad412df726d964ed5d51214 (diff)
downloadcoreboot-bfe8e5186ea9916634d31182ec0437f6175e7724.tar.xz
SMM: don't overwrite SMM memory on resume
Overwriting the SMM Area on resume leaves us with all variables cleared out, i.e., the GNVS pointer is no longer available, which makes SMIF function calls impossible. Change-Id: I08ab4ffd41df0922d63c017822de1f89a3ff254d Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/34 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/smi.c28
-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c7
2 files changed, 29 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c
index 95ec1129a3..5be24049be 100644
--- a/src/southbridge/intel/i82801gx/smi.c
+++ b/src/southbridge/intel/i82801gx/smi.c
@@ -320,6 +320,16 @@ static void smm_relocate(void)
static int smm_handler_copied = 0;
+static int is_wakeup(void)
+{
+ device_t dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
+
+ if (!dev0)
+ return 0;
+
+ return pci_read_config32(dev0, 0xdc) == SKPAD_ACPI_S3_MAGIC;
+}
+
static void smm_install(void)
{
/* The first CPU running this gets to copy the SMM handler. But not all
@@ -329,13 +339,19 @@ static void smm_install(void)
return;
smm_handler_copied = 1;
- /* enable the SMM memory window */
- pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
- D_OPEN | G_SMRAME | C_BASE_SEG);
- /* copy the real SMM handler */
- memcpy((void *)0xa0000, &_binary_smm_start, (size_t)&_binary_smm_size);
- wbinvd();
+ /* if we're resuming from S3, the SMM code is already in place,
+ * so don't copy it again to keep the current SMM state */
+
+ if (!is_wakeup()) {
+ /* enable the SMM memory window */
+ pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
+ D_OPEN | G_SMRAME | C_BASE_SEG);
+
+ /* copy the real SMM handler */
+ memcpy((void *)0xa0000, &_binary_smm_start, (size_t)&_binary_smm_size);
+ wbinvd();
+ }
/* close the SMM memory window and enable normal SMM */
pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 9befbf9ac1..434bfebc18 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -328,6 +328,13 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
default: printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n"); break;
}
+ /* Unlock the SMI semaphore. We're currently in SMM, and the semaphore
+ * will never be unlocked because the next outl will switch off the CPU.
+ * This might open a small race between the smi_release_lock() and the outl()
+ * for other SMI handlers. Not sure if this could cause trouble. */
+ if (slp_typ == 5)
+ smi_release_lock();
+
/* Write back to the SLP register to cause the originally intended
* event again. We need to set BIT13 (SLP_EN) though to make the
* sleep happen.