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| author | Sven Schnelle <svens@stackframe.org> | 2011-06-05 11:39:12 +0200 |
|---|---|---|
| committer | Sven Schnelle <svens@stackframe.org> | 2011-06-07 22:11:46 +0200 |
| commit | e261807baceef199f31528f700fdd9a8a27d348e (patch) | |
| tree | 7acc26279cefd081d563788787be5b05d58b4e60 /src/southbridge/intel | |
| parent | f4dc1a73e440766bbc12b738462ae9467f6030fe (diff) | |
| download | coreboot-e261807baceef199f31528f700fdd9a8a27d348e.tar.xz | |
i82801gx: enable ACPI during S3 resume
disabling ACPI during S3 wakeup breaks ACPI wakeup, as the
Host OS is assuming that ACPI is enabled.
Change-Id: I8ced72c4b553d41a57f26d64998118e8a77621f8
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/7
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/i82801gx/lpc.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 394f161f95..b4b2f41377 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -341,6 +341,7 @@ static void i82801gx_lock_smm(struct device *dev) u8 reg8; #endif + if (acpi_slp_type != 3) { #if ENABLE_ACPI_MODE_IN_COREBOOT printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n"); outb(APM_CNT_ACPI_ENABLE, APM_CNT); // Enable ACPI mode @@ -350,6 +351,10 @@ static void i82801gx_lock_smm(struct device *dev) outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode printk(BIOS_DEBUG, "done.\n"); #endif + } else { + printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n"); + outb(APM_CNT_ACPI_ENABLE, APM_CNT); + } /* Don't allow evil boot loaders, kernels, or * userspace applications to deceive us: */ |