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authorDuncan Laurie <dlaurie@chromium.org>2012-08-27 13:51:23 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-07 18:40:09 +0100
commitf1c76ef60547e3dd38d3554dba227351112d843a (patch)
tree5da3724b2d3041e72c268cf8c8835da3830527a8 /src/southbridge/intel
parenta2f1b953401d071b45eb51bc21ab174759fcc13f (diff)
downloadcoreboot-f1c76ef60547e3dd38d3554dba227351112d843a.tar.xz
ELOG: Don't disable SPI controller lockdown
Now that WREN prefix is handled properly ELOG is able to write when the SPI controller is locked down. To test, ensure that runtime SPI write via ELOG is successful by checking the event log for a kernel shutdown reason code: 5 | 2012-08-27 11:09:48 | Kernel Event | Clean Shutdown 6 | 2012-08-27 11:09:50 | System boot | 26 7 | 2012-08-27 11:09:50 | System Reset Change-Id: If6d0dced7cb0f5ca7038b3d758f31b856826d30b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1712 Reviewed-by: Marc Jones <marcj303@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/finalize.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/finalize.c b/src/southbridge/intel/bd82x6x/finalize.c
index d62600f693..ed1ebf7a9a 100644
--- a/src/southbridge/intel/bd82x6x/finalize.c
+++ b/src/southbridge/intel/bd82x6x/finalize.c
@@ -31,11 +31,8 @@ void intel_pch_finalize_smm(void)
RCBA32(0x3898) = SPI_OPMENU_LOWER;
RCBA32(0x389c) = SPI_OPMENU_UPPER;
-/* Need to fix SMI driver use of opcode menu */
-#if !CONFIG_ELOG_GSMI
/* Lock SPIBAR */
RCBA32_OR(0x3804, (1 << 15));
-#endif
/* TCLOCKDN: TC Lockdown */
RCBA32_OR(0x0050, (1 << 31));