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authorNico Huber <nico.h@gmx.de>2017-06-14 23:04:49 +0200
committerPatrick Rudolph <siro@das-labor.org>2017-06-15 07:47:20 +0200
commitfc209261309c336b64d9407b1b9cdf0e17ad9422 (patch)
tree4c1d341da92989154ce526b8fd18e4f1a1e9b99a /src/southbridge/intel
parenta1f842d158dfd1fea833b8f290c6f11063a783c2 (diff)
downloadcoreboot-fc209261309c336b64d9407b1b9cdf0e17ad9422.tar.xz
Revert "sb/intel/bd82x6x: Disable unused bridges"
This reverts commit f4835a85c0e851d13bcfed53a23f495caeefe8e2. It completely ignores port coalescing and breaks enumeration in many cases. The code reused to disable and hide the root ports was never meant to be called that way. The same effect of power saving can likely be achieved by clock gating unused ports after enumeration without further, error-prone function hiding. Change-Id: I90d8b9236004f0c42d5a2b6bbd39f6dea07bd3d1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/20216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 627b6f7431..91add02d7c 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -269,14 +269,6 @@ static void pch_pcie_enable(device_t dev)
pch_pcie_pm_early(dev);
}
-static void pch_pcie_disable(device_t dev)
-{
- dev->enabled = 0;
-
- /* Let PCH hide the device */
- pch_enable(dev);
-}
-
static void pch_pciexp_scan_bridge(device_t dev)
{
struct southbridge_intel_bd82x6x_config *config = dev->chip_info;
@@ -286,11 +278,6 @@ static void pch_pciexp_scan_bridge(device_t dev)
if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
intel_acpi_pcie_hotplug_scan_slot(dev->link_list);
- } else {
- if (!dev_is_active_bridge(dev)) {
- dev->ops->disable(dev);
- return;
- }
}
/* Late Power Management init after bridge device enumeration */
@@ -318,7 +305,6 @@ static struct device_operations device_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
.init = pci_init,
- .disable = pch_pcie_disable,
.enable = pch_pcie_enable,
.scan_bus = pch_pciexp_scan_bridge,
.ops_pci = &pci_ops,