diff options
author | Aaron Durbin <adurbin@chromium.org> | 2013-03-01 17:12:26 -0600 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-22 00:15:21 +0100 |
commit | fd79562915bbdea93fc7b37e657856acf808e64f (patch) | |
tree | c3807d0f50354d0efaf3835fdda993f9ffa49714 /src/southbridge/intel | |
parent | c0650894f8ca50a7609971418e8eaa4c674f36a9 (diff) | |
download | coreboot-fd79562915bbdea93fc7b37e657856acf808e64f.tar.xz |
romstage: add support for vboot firmware selection
This patch implements support for vboot firmware selection. The vboot
support is comprised of the following pieces:
1. vboot_loader.c - this file contains the entry point,
vboot_verify_firmware(), for romstage to call in order to perform
vboot selection. The loader sets up all the data for the wrapper
to use.
2. vboot_wrapper.c - this file contains the implementation calling the vboot
API. It calls VbInit() and VbSelectFirmware() with the data supplied
by the loader.
The vboot wrapper is compiled and linked as an rmodule and placed in
cbfs as 'fallback/vboot'. It's loaded into memory and relocated just
like the way ramstage would be. After being loaded the loader calls into
wrapper. When the wrapper sees that a given piece of firmware has been
selected it parses firmware component information for a predetermined
number of components.
Vboot result information is passed to downstream users by way of the
vboot_handoff structure. This structure lives in cbmem and contains
the shared data, selected firmware, VbInitParams, and parsed firwmare
components.
During ramstage there are only 2 changes:
1. Copy the shared vboot data from vboot_handoff to the chromeos acpi
table.
2. If a firmware selection was made in romstage the boot loader
component is used for the payload.
Noteable Information:
- no vboot path for S3.
- assumes that all RW firmware contains a book keeping header for the
components that comprise the signed firmware area.
- As sanity check there is a limit to the number of firmware components
contained in a signed firmware area. That's so that an errant value
doesn't cause the size calculation to erroneously read memory it
shouldn't.
- RO normal path isn't supported. It's assumed that firmware will always
load the verified RW on all boots but recovery.
- If vboot requests memory to be cleared it is assumed that the boot
loader will take care of that by looking at the out flags in
VbInitParams.
Built and booted. Noted firmware select worked on an image with
RW firmware support. Also checked that recovery mode worked as well
by choosing the RO path.
Change-Id: I45de725c44ee5b766f866692a20881c42ee11fa8
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2854
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r-- | src/southbridge/intel/lynxpoint/spi_loading.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/spi_loading.c b/src/southbridge/intel/lynxpoint/spi_loading.c index eb3082bb5a..1ae7a263eb 100644 --- a/src/southbridge/intel/lynxpoint/spi_loading.c +++ b/src/southbridge/intel/lynxpoint/spi_loading.c @@ -21,9 +21,15 @@ #include <stdlib.h> #include <string.h> #include <arch/byteorder.h> +#include <cbmem.h> #include <cbfs.h> #include <console/console.h> #include <cpu/x86/smm.h> +#if CONFIG_VBOOT_VERIFY_FIRMWARE +#include <vendorcode/google/chromeos/chromeos.h> +#else +static inline void *vboot_get_payload(int *len) { return NULL; } +#endif #define CACHELINE_SIZE 64 #define INTRA_CACHELINE_MASK (CACHELINE_SIZE - 1) @@ -69,7 +75,14 @@ void *cbfs_load_payload(struct cbfs_media *media, const char *name) { int file_len; void *file_start; - struct cbfs_file *file = cbfs_get_file(media, name); + struct cbfs_file *file; + + file_start = vboot_get_payload(&file_len); + + if (file_start != NULL) + return spi_mirror(file_start, file_len); + + file = cbfs_get_file(media, name); if (file == NULL) return NULL; |