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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-08-12 20:40:37 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-08-29 18:35:47 +0200
commit24100100181bd770ce0f1181a1770a0808790cde (patch)
treeed9b812999f747902f0294859f98b149848716f9 /src/southbridge/intel
parentf7381f8cd1cf4307dcccd5728fc11afce3610439 (diff)
downloadcoreboot-24100100181bd770ce0f1181a1770a0808790cde.tar.xz
usbdebug: Change debug port scanning
On AMD platforms, setting of USBDEBUG_DEFAULT_PORT=0 tries to scan all physical ports one after other in incrementing order. To avoid possible problems with other USB devices, one can select the port number here and bypass the scan. Intel platforms can communicate with usbdebug dongle on one physical port only, and this option makes no difference there. Change-Id: I45be6cc3aa91b74650eda2d444c9fcad39d58897 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3872 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/Kconfig4
-rw-r--r--src/southbridge/intel/i82801ix/Kconfig4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index d4a6baa2ce..62c6b436f2 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -36,10 +36,6 @@ config EHCI_DEBUG_OFFSET
hex
default 0xa0
-config USBDEBUG_DEFAULT_PORT
- int
- default 1
-
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/intel/i82801gx/bootblock.c"
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig
index dd07dac7a2..8a4a53ef78 100644
--- a/src/southbridge/intel/i82801ix/Kconfig
+++ b/src/southbridge/intel/i82801ix/Kconfig
@@ -37,10 +37,6 @@ config EHCI_DEBUG_OFFSET
hex
default 0xa0
-config USBDEBUG_DEFAULT_PORT
- int
- default 1
-
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/intel/i82801ix/bootblock.c"