fsp_rangeley: Switch to per-device ACPI

Change-Id: Ic8b2204a6d08d63ac7f05836bf1424f1ca6ee50e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7046
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)

3 files changed, 30 insertions, 1 deletions

diff --git a/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl b/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl
index 21209db6ba..c5c1a9a2e3 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl
+++ b/src/southbridge/intel/fsp_rangeley/acpi/globalnvs.asl
@@ -32,7 +32,8 @@ Name(\DSEN, 1)		// Display Output Switching Enable
  */
 
 
-OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0xf00)
+External(NVSA)
+OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 8576b613cd..9644067971 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -31,8 +31,13 @@
 #include <arch/acpi.h>
 #include <cpu/cpu.h>
 #include <elog.h>
+#include <string.h>
+#include <cbmem.h>
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include "soc.h"
 #include "irq.h"
+#include "nvs.h"
 
 #define NMI_OFF	0
 
@@ -426,6 +431,26 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+static void southbridge_inject_dsdt(void)
+{
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+
+	if (gnvs) {
+		memset(gnvs, 0, sizeof(*gnvs));
+		acpi_create_gnvs(gnvs);
+		acpi_save_gnvs((unsigned long)gnvs);
+#if CONFIG_HAVE_SMI_HANDLER
+		/* And tell SMI about it */
+		smm_setup_structures(gnvs, NULL, NULL);
+#endif
+
+		/* Add it to DSDT.  */
+		acpigen_write_scope("\\");
+		acpigen_write_name_dword("NVSA", (u32) gnvs);
+		acpigen_pop_len();
+	}
+}
+
 static struct pci_operations pci_ops = {
 	.set_subsystem = set_subsystem,
 };
@@ -435,6 +460,8 @@ static struct device_operations device_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= soc_lpc_enable_resources,
 	.init			= lpc_init,
+	.write_acpi_tables      = acpi_write_hpet,
+	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.enable			= soc_lpc_enable,
 	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,
diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h
index dce23e0d41..6578bbf189 100644
--- a/src/southbridge/intel/fsp_rangeley/nvs.h
+++ b/src/southbridge/intel/fsp_rangeley/nvs.h
@@ -149,6 +149,7 @@ typedef struct {
 
 } __attribute__((packed)) global_nvs_t;
 
+void acpi_create_gnvs(global_nvs_t *gnvs);
 #ifdef __SMM__
 /* Used in SMM to find the ACPI GNVS address */
 global_nvs_t *smm_get_gnvs(void);