summaryrefslogtreecommitdiff
path: root/src/southbridge/intel
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-06-11 11:23:52 +0200
committerArthur Heymans <arthur@aheymans.xyz>2019-06-18 13:39:09 +0000
commit7407210a6755b22862c22a87c21ed172cb646616 (patch)
treeaf601ef9d00ae3f34fa921c71d863d838bec3c2c /src/southbridge/intel
parent816aaba399537349b068afbd9bde702d00243f54 (diff)
downloadcoreboot-7407210a6755b22862c22a87c21ed172cb646616.tar.xz
sb/intel/bd82x6x/lpc.c: Remove reinitializing the SPI driver
This was done to update the global variable g_ichspi_lock but this is now removed in favor of reading the lock bit during runtime instead of keeping track of the state. Change-Id: I8cb69a152b0e050d64d8979ee92de2d24136f8dc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33390 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 773750186f..661c1d483d 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -908,12 +908,6 @@ static void lpc_final(struct device *dev)
if (CONFIG(INTEL_CHIPSET_LOCKDOWN) ||
acpi_is_wakeup_s3()) {
outb(APM_CNT_FINALIZE, APM_CNT);
- if (CONFIG(CONSOLE_SPI_FLASH))
- /* Re-init SPI driver to handle locked BAR.
- This prevents flashconsole from hanging.
- If other code needs to use SPI during
- ramstage, whitelist it here. */
- spi_init();
}
}
}