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authorAngel Pons <th3fanbus@gmail.com>2020-06-21 16:16:22 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-06-27 23:36:34 +0000
commitb60aeca26cf4fa95d759129dce41981c4f09043c (patch)
tree7ef9430650ae1f8329e9e46b8d34c6518288ead7 /src/southbridge/intel
parent547fe82cd034c8668f53668a8ad2a54b3030084c (diff)
downloadcoreboot-b60aeca26cf4fa95d759129dce41981c4f09043c.tar.xz
sb/intel/i82801jx: Drop `p_cnt_throttling_supported`
The three mainboards using this southbridge do not support it. Change-Id: I006f1ec26c40f7e2dfc2ddedb017278455368bb9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42655 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801jx/chip.h1
-rw-r--r--src/southbridge/intel/i82801jx/fadt.c5
2 files changed, 1 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index 3c92da95fb..028d5c8bf0 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -49,7 +49,6 @@ struct southbridge_intel_i82801jx_config {
int c5_enable : 1;
int c6_enable : 1;
int c3_latency;
- int p_cnt_throttling_supported:1;
int docking_supported:1;
int throttle_duty : 3;
diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c
index e54ecd9632..c0a9d53b04 100644
--- a/src/southbridge/intel/i82801jx/fadt.c
+++ b/src/southbridge/intel/i82801jx/fadt.c
@@ -46,10 +46,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->flush_size = 0;
fadt->flush_stride = 0;
fadt->duty_offset = 1;
- if (chip->p_cnt_throttling_supported)
- fadt->duty_width = 3;
- else
- fadt->duty_width = 0;
+ fadt->duty_width = 0;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->century = 0x32;