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authorElyes HAOUAS <ehaouas@noos.fr>2018-12-12 15:05:33 +0100
committerFelix Held <felix-coreboot@felixheld.de>2018-12-18 13:56:02 +0000
commitbb071c1283d86970c3140cf21ac3294a889d31f6 (patch)
tree377670e51cecf81b8125769a211115e22fccdf3d /src/southbridge/intel
parent586f24dab48c187c739ab725589248ff02999f3a (diff)
downloadcoreboot-bb071c1283d86970c3140cf21ac3294a889d31f6.tar.xz
southbridge: Remove unneeded include <pc80/mc146818rtc.h>
Change-Id: Ic3f7d4d570cb5e343a9cf616e6e71935f9522b0a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29308 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c1
-rw-r--r--src/southbridge/intel/bd82x6x/smihandler.c1
-rw-r--r--src/southbridge/intel/common/pmutil.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c1
-rw-r--r--src/southbridge/intel/i82801ix/smihandler.c1
-rw-r--r--src/southbridge/intel/i82870/ioapic.c1
-rw-r--r--src/southbridge/intel/i82870/pcibridge.c1
7 files changed, 0 insertions, 7 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index c3422419df..167311f2ba 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -17,7 +17,6 @@
#include <arch/io.h>
#include <arch/cbfs.h>
#include <ip_checksum.h>
-#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
#include <delay.h>
diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c
index 6291867e3f..69df2bf68c 100644
--- a/src/southbridge/intel/bd82x6x/smihandler.c
+++ b/src/southbridge/intel/bd82x6x/smihandler.c
@@ -22,7 +22,6 @@
#include <cpu/x86/smm.h>
#include <elog.h>
#include <halt.h>
-#include <pc80/mc146818rtc.h>
#include "pch.h"
#include "nvs.h"
diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c
index ac72eba87b..abe7cc361e 100644
--- a/src/southbridge/intel/common/pmutil.c
+++ b/src/southbridge/intel/common/pmutil.c
@@ -21,7 +21,6 @@
#include <device/pci_def.h>
#include <cpu/x86/smm.h>
#include <elog.h>
-#include <pc80/mc146818rtc.h>
#include <southbridge/intel/common/pmbase.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 270e7ce3db..f986d79d36 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -22,7 +22,6 @@
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
#include <cbmem.h>
#include <console/console.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c
index e60fa9b788..af418b2994 100644
--- a/src/southbridge/intel/i82801ix/smihandler.c
+++ b/src/southbridge/intel/i82801ix/smihandler.c
@@ -21,7 +21,6 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <device/pci_def.h>
-#include <pc80/mc146818rtc.h>
#include <southbridge/intel/common/pmutil.h>
#include "i82801ix.h"
diff --git a/src/southbridge/intel/i82870/ioapic.c b/src/southbridge/intel/i82870/ioapic.c
index a2512c95df..4fbf329342 100644
--- a/src/southbridge/intel/i82870/ioapic.c
+++ b/src/southbridge/intel/i82870/ioapic.c
@@ -16,7 +16,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
#include <assert.h>
#include "82870.h"
diff --git a/src/southbridge/intel/i82870/pcibridge.c b/src/southbridge/intel/i82870/pcibridge.c
index e6ef6b2e03..a375568b71 100644
--- a/src/southbridge/intel/i82870/pcibridge.c
+++ b/src/southbridge/intel/i82870/pcibridge.c
@@ -15,7 +15,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
#include "82870.h"
static void p64h2_pcix_init(struct device *dev)