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authorElyes HAOUAS <ehaouas@noos.fr>2017-07-03 21:35:58 +0200
committerWerner Zeh <werner.zeh@siemens.com>2017-07-06 08:49:25 +0000
commitddb64d33a0c4e005a30092960953707b12fd78c6 (patch)
tree1d2e9ed298adb8a2fbeb3e4a59938677095be3ae /src/southbridge/intel
parent43927bae1846e0768cbfad717f4820f408cde82b (diff)
downloadcoreboot-ddb64d33a0c4e005a30092960953707b12fd78c6.tar.xz
sb/intel/i82801gx: Add whitespace around '<<'
Change-Id: I8ea8fdb031c09aac9ed4a0705c3204f87aadb565 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/smi.c4
-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c
index 45fcb10307..17a81c1757 100644
--- a/src/southbridge/intel/i82801gx/smi.c
+++ b/src/southbridge/intel/i82801gx/smi.c
@@ -232,9 +232,9 @@ static u32 reset_tco_status(void)
reg32 = inl(tcobase + 0x04);
/* set status bits are cleared by writing 1 to them */
- outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
+ outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
if (reg32 & (1 << 18))
- outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS
+ outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS
return reg32;
}
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 6bd9517f42..6075db9e8b 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -248,9 +248,9 @@ static u32 reset_tco_status(void)
reg32 = inl(tcobase + 0x04);
/* set status bits are cleared by writing 1 to them */
- outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
+ outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
if (reg32 & (1 << 18))
- outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS
+ outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS
return reg32;
}