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| author | Sylvain Hitier <sylvain.hitier@gmail.com> | 2010-10-11 23:22:24 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-11 23:22:24 +0000 |
| commit | 5b2fd1ea1568eaee821fe0e5250bd636b01d6024 (patch) | |
| tree | 470318c668ca539c724fcebdc086acb614a629af /src/southbridge/intel | |
| parent | e62fc0d355d11c4081d9ef587bb4f75d345f2900 (diff) | |
| download | coreboot-5b2fd1ea1568eaee821fe0e5250bd636b01d6024.tar.xz | |
Fix typo after r5925.
BTW, embed the always-the-same string instead of referencing it through "%s".
Do the same for i82371EB while we're at it.
Signed-off-by: Sylvain Hitier <sylvain.hitier@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb_ide.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ax/i82801ax_ide.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb_ide.c b/src/southbridge/intel/i82371eb/i82371eb_ide.c index f1b618fa71..f72bcb63c6 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_ide.c +++ b/src/southbridge/intel/i82371eb/i82371eb_ide.c @@ -48,14 +48,14 @@ static void ide_init_enable(struct device *dev) reg16 = pci_read_config16(dev, IDETIM_PRI); reg16 = ONOFF(conf->ide0_enable, reg16, IDE_DECODE_ENABLE); pci_write_config16(dev, IDETIM_PRI, reg16); - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Primary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Primary", conf->ide0_enable ? "on" : "off"); /* Enable/disable the secondary IDE interface. */ reg16 = pci_read_config16(dev, IDETIM_SEC); reg16 = ONOFF(conf->ide1_enable, reg16, IDE_DECODE_ENABLE); pci_write_config16(dev, IDETIM_SEC, reg16); - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Secondary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Secondary", conf->ide1_enable ? "on" : "off"); /* Enable access to the legacy IDE ports (both primary and secondary), diff --git a/src/southbridge/intel/i82801ax/i82801ax_ide.c b/src/southbridge/intel/i82801ax/i82801ax_ide.c index 98bc542d07..c5bd2882b4 100644 --- a/src/southbridge/intel/i82801ax/i82801ax_ide.c +++ b/src/southbridge/intel/i82801ax/i82801ax_ide.c @@ -38,7 +38,7 @@ static void ide_init(struct device *dev) reg16 &= ~IDE_DECODE_ENABLE; if (!conf || conf->ide0_enable) reg16 |= IDE_DECODE_ENABLE; - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Primary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Primary", conf->ide0_enable ? "on" : "off"); pci_write_config16(dev, IDE_TIM_PRI, reg16); @@ -46,7 +46,7 @@ static void ide_init(struct device *dev) reg16 &= ~IDE_DECODE_ENABLE; if (!conf || conf->ide1_enable) reg16 |= IDE_DECODE_ENABLE; - printk(BIOS_DEBUG, "IDE: %s: %s\n", "Primary IDE interface", + printk(BIOS_DEBUG, "IDE: %s IDE interface: %s\n", "Secondary", conf->ide0_enable ? "on" : "off"); pci_write_config16(dev, IDE_TIM_SEC, reg16); } |