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authorMyles Watson <mylesgw@gmail.com>2010-06-09 22:41:35 +0000
committerMyles Watson <mylesgw@gmail.com>2010-06-09 22:41:35 +0000
commit894a34715f41f7c819a593dc3ff8e3033ffaa9fe (patch)
tree12ed2a5e10c6f181caa4c1add2ee8239abf82bfe /src/southbridge/intel
parent6507b390467591928f16aab68f247321ad3f2262 (diff)
downloadcoreboot-894a34715f41f7c819a593dc3ff8e3033ffaa9fe.tar.xz
Same conversion as with resources from static arrays to lists, except
there is no free list. Converting resource arrays to lists reduced the size of each device struct from 1092 to 228 bytes. Converting link arrays to lists reduced the size of each device struct from 228 to 68 bytes. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_pci.c4
-rw-r--r--src/southbridge/intel/pxhd/pxhd_bridge.c5
2 files changed, 4 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pci.c b/src/southbridge/intel/i82801gx/i82801gx_pci.c
index c4c22f0ae8..1bdc67ae86 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_pci.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_pci.c
@@ -100,10 +100,10 @@ static void ich_pci_bus_enable_resources(struct device *dev)
/* enable IO in command register if there is VGA card
* connected with (even it does not claim IO resource)
*/
- if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA)
+ if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
dev->command |= PCI_COMMAND_IO;
ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
- ctrl |= dev->link[0].bridge_ctrl;
+ ctrl |= dev->link_list->bridge_ctrl;
ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* error check */
printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
diff --git a/src/southbridge/intel/pxhd/pxhd_bridge.c b/src/southbridge/intel/pxhd/pxhd_bridge.c
index bfce8b6087..1134f8f2f8 100644
--- a/src/southbridge/intel/pxhd/pxhd_bridge.c
+++ b/src/southbridge/intel/pxhd/pxhd_bridge.c
@@ -41,8 +41,7 @@ static unsigned int pxhd_scan_bridge(device_t dev, unsigned int max)
{
int bus_100Mhz = 0;
- dev->link[0].dev = dev;
- dev->links = 1;
+ dev->link_list->dev = dev;
get_option(&bus_100Mhz, "pxhd_bus_speed_100");
if(bus_100Mhz) {
@@ -58,7 +57,7 @@ static unsigned int pxhd_scan_bridge(device_t dev, unsigned int max)
pci_write_config16(dev, 0x40, word);
/* reset the bus to make the new frequencies effective */
- pci_bus_reset(&dev->link[0]);
+ pci_bus_reset(dev->link_list);
}
return pcix_scan_bridge(dev, max);
}