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| author | Stefan Reinauer <reinauer@chromium.org> | 2013-05-21 12:43:09 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-12-05 20:11:39 +0100 |
| commit | b86062959b8fbd0276f3455539badd86ac0ae867 (patch) | |
| tree | 39c667af3c0d60e613a4e3920f2dcb024a529900 /src/southbridge/intel | |
| parent | 414cd436c9f0f9606778890e1cbc88131732f3d2 (diff) | |
| download | coreboot-b86062959b8fbd0276f3455539badd86ac0ae867.tar.xz | |
libpayload: Have similar cache api on ARM and x86
So far this is used by the USB driver, and instead of
having ifdefs all throughout that code, implement the same
API on x86 and ARM.
Change-Id: I8093ad818ad2e38a0901787aa8674faf591d580c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56105
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4320
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions