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authorSven Schnelle <svens@stackframe.org>2011-06-04 19:35:22 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2011-06-06 17:56:13 +0200
commitc21b054acc866dc79c4783338e97337b9ca9c587 (patch)
tree109d4110045d1fdc7639addb89f0a42a9461c3bd /src/southbridge/intel
parent140a990a612e25a6d4974f696b9fa757e834d764 (diff)
downloadcoreboot-c21b054acc866dc79c4783338e97337b9ca9c587.tar.xz
SMM: add mainboard_apm_cnt() callback
motherboards can use this hook to get notified if someone writes to the APM_CNT port (0xb2). If the hook returns 1, the chipset specific hook is also skipped. Change-Id: I05f1a27cebf9d25db8064f2adfd2a0f5759e48b5 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/3 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index aefa283571..bccf6d5f05 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -362,6 +362,9 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
/* Emulate B2 register as the FADT / Linux expects it */
reg8 = inb(APM_CNT);
+ if (mainboard_apm_cnt && mainboard_apm_cnt(reg8))
+ return;
+
switch (reg8) {
case CST_CONTROL:
/* Calling this function seems to cause