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| author | Patrick Rudolph <siro@das-labor.org> | 2017-07-22 12:16:11 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-25 15:11:52 +0000 |
| commit | 0e4f83e7b0c6719872b2eef41a0da7b7e8dceab3 (patch) | |
| tree | e58948b5baaced20c2a82d3edbdcc21a4bf06d0a /src/southbridge/intel | |
| parent | 87863fd69242f104ab756ac7a774593b9a644759 (diff) | |
| download | coreboot-0e4f83e7b0c6719872b2eef41a0da7b7e8dceab3.tar.xz | |
sb/intel/common/gpio: Only set one bit at time
Make sure to set only one bit instead of arbitrary bits set in argument.
Change-Id: I39426193d15d8581f79bc2a45c0edb53b19a2cd3
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20707
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/common/gpio.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/common/gpio.c b/src/southbridge/intel/common/gpio.c index d861383ddd..caf24f44c8 100644 --- a/src/southbridge/intel/common/gpio.c +++ b/src/southbridge/intel/common/gpio.c @@ -142,7 +142,8 @@ void set_gpio(int gpio_num, int value) config = inl(gpio_base + gpio_reg_offsets[index]); config &= ~(1 << bit); - config |= value << bit; + if (value != 0) + config |= (1 << bit); outl(config, gpio_base + gpio_reg_offsets[index]); } |