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author | Stefan Reinauer <reinauer@chromium.org> | 2013-07-16 11:03:27 -0700 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 13:00:21 +0100 |
commit | 10bd772db854c62528c67b9d0e5e329c525d83f9 (patch) | |
tree | b6819f825de507d49c9aa4d2b9c228337e00ff55 /src/southbridge/intel | |
parent | c59fda321697974d467dc7ae8f7b22b43a1899af (diff) | |
download | coreboot-10bd772db854c62528c67b9d0e5e329c525d83f9.tar.xz |
Enable CAR migration on Exynos 5250 and 5420
Despite calling romstage memory CAR in this case, the variables actually
do live in SRAM on the Exynos CPUs. However, in order to share as much
generic code as possible, we're using the same infrastructure here.
Change-Id: I85173c37099a25f3e55980e88120401826cdf29c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/62188
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4394
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions