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authorElyes HAOUAS <ehaouas@noos.fr>2019-05-12 09:33:14 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-13 09:31:28 +0000
commit11a5b6b577d5e4c2611ac80dd0b7f761b80f942f (patch)
tree7b268ccdc9c64850877316f688f3985c457bcb30 /src/southbridge/intel
parent8dd518969cf02e37412019e4a6a4a5ce496da8c0 (diff)
downloadcoreboot-11a5b6b577d5e4c2611ac80dd0b7f761b80f942f.tar.xz
i82801gx/bootblock: Use macro instead of magic number
Change-Id: I2556c150f53d9580bc3b70ab49b3a2c8477c18ea Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32755 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/bootblock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index 426973fc2f..9d94d0cd25 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -23,10 +23,10 @@ static void enable_spi_prefetch(void)
dev = PCI_DEV(0, 0x1f, 0);
- reg8 = pci_read_config8(dev, 0xdc);
+ reg8 = pci_read_config8(dev, BIOS_CNTL);
reg8 &= ~(3 << 2);
reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
- pci_write_config8(dev, 0xdc, reg8);
+ pci_write_config8(dev, BIOS_CNTL, reg8);
}
static void bootblock_southbridge_init(void)