diff options
| author | Stefan Tauner <stefan.tauner@gmx.at> | 2018-08-04 22:03:12 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-07 07:09:11 +0000 |
| commit | 1758e73ee6f4a3a80d7bf64a9c6c722ffe1443b9 (patch) | |
| tree | 3e478c7f55b34ba97603fc968250f3235db8f071 /src/southbridge/intel | |
| parent | fcba4272293c2094b961e63bc11b5ab365104092 (diff) | |
| download | coreboot-1758e73ee6f4a3a80d7bf64a9c6c722ffe1443b9.tar.xz | |
sb/intel/i82801[ijg]x: remove stale board-specific comments from ich*.asl
Apparently they were introduced when refining ICH7 support when
porting Kontron 986LCD-M and then copied over to ICH9 and 10.
Change-Id: I2d9ece608955310d22b79574b9113a1521b2076c
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/27855
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/i82801gx/acpi/ich7.asl | 42 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/acpi/ich9.asl | 42 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/ich10.asl | 43 |
3 files changed, 63 insertions, 64 deletions
diff --git a/src/southbridge/intel/i82801gx/acpi/ich7.asl b/src/southbridge/intel/i82801gx/acpi/ich7.asl index cf158df729..c28f4b98a5 100644 --- a/src/southbridge/intel/i82801gx/acpi/ich7.asl +++ b/src/southbridge/intel/i82801gx/acpi/ich7.asl @@ -60,28 +60,28 @@ Scope(\) GP03, 1, GP04, 1, GP05, 1, - GP06, 1, // GDET + GP06, 1, GP07, 1, GP08, 1, - GP09, 1, // HPMU - GP10, 1, // GPSE + GP09, 1, + GP10, 1, GP11, 1, - GP12, 1, // WLED - GP13, 1, // BLED - GP14, 1, // GLED - GP15, 1, // GDIS + GP12, 1, + GP13, 1, + GP14, 1, + GP15, 1, GP16, 1, GP17, 1, - GP18, 1, // SPCI - GP19, 1, // TSDT - GP20, 1, // SCPU + GP18, 1, + GP19, 1, + GP20, 1, GP21, 1, GP22, 1, - GP23, 1, // LANP - GP24, 1, // DKLR - GP25, 1, // WLAN - GP26, 1, // SATA_PWR_EN #0 / SPOF - GP27, 1, // SATA_PWR_EN #1 / SPMU + GP23, 1, + GP24, 1, + GP25, 1, + GP26, 1, + GP27, 1, GP28, 1, GP29, 1, GP30, 1, @@ -108,13 +108,13 @@ Scope(\) GIO7, 8, Offset(0x38), // GPIO Level 2 GP32, 1, - GP33, 1, // CREN - GP34, 1, // CRRS + GP33, 1, + GP34, 1, GP35, 1, - GP36, 1, // STAD - GP37, 1, // PATA_PWR_EN / HDDE - GP38, 1, // Battery / Power (?) / MB00 - GP39, 1, // ?? / MB01 + GP36, 1, + GP37, 1, + GP38, 1, + GP39, 1, GL05, 8, GL06, 8, GL07, 8 diff --git a/src/southbridge/intel/i82801ix/acpi/ich9.asl b/src/southbridge/intel/i82801ix/acpi/ich9.asl index 52b263f3eb..78d1f53966 100644 --- a/src/southbridge/intel/i82801ix/acpi/ich9.asl +++ b/src/southbridge/intel/i82801ix/acpi/ich9.asl @@ -63,28 +63,28 @@ Scope(\) GP03, 1, GP04, 1, GP05, 1, - GP06, 1, // GDET + GP06, 1, GP07, 1, GP08, 1, - GP09, 1, // HPMU - GP10, 1, // GPSE + GP09, 1, + GP10, 1, GP11, 1, - GP12, 1, // WLED - GP13, 1, // BLED - GP14, 1, // GLED - GP15, 1, // GDIS + GP12, 1, + GP13, 1, + GP14, 1, + GP15, 1, GP16, 1, GP17, 1, - GP18, 1, // SPCI - GP19, 1, // TSDT - GP20, 1, // SCPU + GP18, 1, + GP19, 1, + GP20, 1, GP21, 1, GP22, 1, - GP23, 1, // LANP - GP24, 1, // DKLR - GP25, 1, // WLAN - GP26, 1, // SATA_PWR_EN #0 / SPOF - GP27, 1, // SATA_PWR_EN #1 / SPMU + GP23, 1, + GP24, 1, + GP25, 1, + GP26, 1, + GP27, 1, GP28, 1, GP29, 1, GP30, 1, @@ -111,13 +111,13 @@ Scope(\) GIO7, 8, Offset(0x38), // GPIO Level 2 GP32, 1, - GP33, 1, // CREN - GP34, 1, // CRRS + GP33, 1, + GP34, 1, GP35, 1, - GP36, 1, // STAD - GP37, 1, // PATA_PWR_EN / HDDE - GP38, 1, // Battery / Power (?) / MB00 - GP39, 1, // ?? / MB01 + GP36, 1, + GP37, 1, + GP38, 1, + GP39, 1, GL05, 8, GL06, 8, GL07, 8 diff --git a/src/southbridge/intel/i82801jx/acpi/ich10.asl b/src/southbridge/intel/i82801jx/acpi/ich10.asl index 985e8b657a..b7d8a33cf9 100644 --- a/src/southbridge/intel/i82801jx/acpi/ich10.asl +++ b/src/southbridge/intel/i82801jx/acpi/ich10.asl @@ -41,7 +41,6 @@ Scope(\) SCIS, 1 // TCO DMI status } - // FIXME: purposes of the GPIOs (comments) are probably wrong // ICH10 GPIO IO mapped registers (0x1f.0 reg 0x48.l) OperationRegion(GPIO, SystemIO, DEFAULT_GPIOBASE, 0x3c) Field(GPIO, ByteAcc, NoLock, Preserve) @@ -63,28 +62,28 @@ Scope(\) GP03, 1, GP04, 1, GP05, 1, - GP06, 1, // GDET + GP06, 1, GP07, 1, GP08, 1, - GP09, 1, // HPMU - GP10, 1, // GPSE + GP09, 1, + GP10, 1, GP11, 1, - GP12, 1, // WLED - GP13, 1, // BLED - GP14, 1, // GLED - GP15, 1, // GDIS + GP12, 1, + GP13, 1, + GP14, 1, + GP15, 1, GP16, 1, GP17, 1, - GP18, 1, // SPCI - GP19, 1, // TSDT - GP20, 1, // SCPU + GP18, 1, + GP19, 1, + GP20, 1, GP21, 1, GP22, 1, - GP23, 1, // LANP - GP24, 1, // DKLR - GP25, 1, // WLAN - GP26, 1, // SATA_PWR_EN #0 / SPOF - GP27, 1, // SATA_PWR_EN #1 / SPMU + GP23, 1, + GP24, 1, + GP25, 1, + GP26, 1, + GP27, 1, GP28, 1, GP29, 1, GP30, 1, @@ -111,13 +110,13 @@ Scope(\) GIO7, 8, Offset(0x38), // GPIO Level 2 GP32, 1, - GP33, 1, // CREN - GP34, 1, // CRRS + GP33, 1, + GP34, 1, GP35, 1, - GP36, 1, // STAD - GP37, 1, // PATA_PWR_EN / HDDE - GP38, 1, // Battery / Power (?) / MB00 - GP39, 1, // ?? / MB01 + GP36, 1, + GP37, 1, + GP38, 1, + GP39, 1, GL05, 8, GL06, 8, GL07, 8 |