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authorVladimir Serbinenko <phcoder@gmail.com>2014-06-07 16:41:14 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-06-11 19:43:46 +0200
commit61f902d4a7779d0ce30de79df7a71ad0c3788887 (patch)
tree16c54df7d7f7bb2ef05f7c8d8663658b053d41ce /src/southbridge/intel
parent49c3045c2dc6852c80e6fa7fca8ecf2a9ecf3c06 (diff)
downloadcoreboot-61f902d4a7779d0ce30de79df7a71ad0c3788887.tar.xz
ibexpeak: Set number of USB ports.
Change-Id: Ife3febcc88967386dfae624cd237562a34a68471 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5956 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/ibexpeak/usb_ehci.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c
index 21a257f328..868a06843c 100644
--- a/src/southbridge/intel/ibexpeak/usb_ehci.c
+++ b/src/southbridge/intel/ibexpeak/usb_ehci.c
@@ -30,6 +30,8 @@
static void usb_ehci_init(struct device *dev)
{
u32 reg32;
+ struct resource *res;
+ u8 access_cntl;
/* Disable Wake on Disconnect in RMH */
reg32 = RCBA32(0x35b0);
@@ -50,6 +52,21 @@ static void usb_ehci_init(struct device *dev)
//reg32 |= PCI_COMMAND_SERR;
pci_write_config32(dev, PCI_COMMAND, reg32);
+ access_cntl = pci_read_config8(dev, 0x80);
+
+ /* Enable writes to protected registers. */
+ pci_write_config8(dev, 0x80, access_cntl | 1);
+
+ res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ if (res) {
+ /* Number of ports and companion controllers. */
+ reg32 = read32(res->base + 4);
+ write32(res->base + 4, (reg32 & 0xfff00000) | 2);
+ }
+
+ /* Restore protection. */
+ pci_write_config8(dev, 0x80, access_cntl);
+
printk(BIOS_DEBUG, "done.\n");
}