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authorArthur Heymans <arthur@aheymans.xyz>2018-01-25 21:38:25 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-23 14:45:34 +0000
commit6336d4c48d2f85629ff668da36711ea794f70ab5 (patch)
tree1cafe0dde00967c76897312d80fca723bf0a2f79 /src/southbridge/intel
parentea415b335f57bde8e744e0f40845cc6fdd671c71 (diff)
downloadcoreboot-6336d4c48d2f85629ff668da36711ea794f70ab5.tar.xz
nb/intel/gm45: Use parallel MP init
This places the parallel mp ops up in the model_1067x dir and is included from other Intel core2 CPU dirs that can use the same code. Tested on Thinkpad X200 on which boot time is reduced by ~35ms. Change-Id: Iac416f671407246ee223075eee1aff511e612889 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/23434 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index e18f616b82..f9e11140ff 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -393,7 +393,8 @@ static void i82801ix_lock_smm(struct device *dev)
/* Don't allow evil boot loaders, kernels, or
* userspace applications to deceive us:
*/
- smm_lock();
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+ smm_lock();
#if TEST_SMM_FLASH_LOCKDOWN
/* Now try this: */