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authorArthur Heymans <arthur@aheymans.xyz>2019-11-12 23:48:42 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-15 16:46:18 +0000
commitc583920a748fb8bd7999142433ad08641b06283d (patch)
treeac67268b34fed71bbf5f2915e6da0860151e60ee /src/southbridge/intel
parente27c013f39f0433dac57a754b3484553a536f30d (diff)
downloadcoreboot-c583920a748fb8bd7999142433ad08641b06283d.tar.xz
nb/intel/i945: Initialize console in bootblock
Change-Id: Ic6ea158714998195614a63ee46a057f405de5616 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36796 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/common/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 68e423af59..9ff0ebc5a1 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -32,6 +32,7 @@ bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
+bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c