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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-02-09 19:21:30 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-02-16 20:10:54 +0100 |
| commit | 6f6a249a75927476ba5e06bb2b0a0138e0cf63ea (patch) | |
| tree | 81c789db2e93396738929c9bb3b26b84771135b6 /src/southbridge/intel | |
| parent | 6e56de3d202c2175a13c91ab2c1bc1eb0d7f652a (diff) | |
| download | coreboot-6f6a249a75927476ba5e06bb2b0a0138e0cf63ea.tar.xz | |
usbdebug: Remove EHCI_DEBUG_OFFSET
Read this variable from PCI configuration capabilities list instead.
Change-Id: I0cfe981833873397c32cd3aa2af307f35f01784b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5176
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801dx/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ex/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/sch/Kconfig | 4 |
9 files changed, 0 insertions, 36 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index d060dae406..9cfa5d5b26 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -41,10 +41,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config DRAM_RESET_GATE_GPIO int default 60 diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig index 1a8e80ac07..b2b4929348 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Kconfig +++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig @@ -37,10 +37,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/fsp_bd82x6x/bootblock.c" diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index f7f93a7c78..8ef778fad3 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -33,8 +33,4 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0x80 - endif diff --git a/src/southbridge/intel/i82801ex/Kconfig b/src/southbridge/intel/i82801ex/Kconfig index e4e9160a41..caa5c79ad9 100644 --- a/src/southbridge/intel/i82801ex/Kconfig +++ b/src/southbridge/intel/i82801ex/Kconfig @@ -11,8 +11,4 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - endif diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 62c6b436f2..777b69b600 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -32,10 +32,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/i82801gx/bootblock.c" diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index 8a4a53ef78..493be60123 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -33,10 +33,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/i82801ix/bootblock.c" diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index 97d5883222..c05fe43475 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -39,10 +39,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config DRAM_RESET_GATE_GPIO int default 60 diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 5ff00db1e6..bfb7b734cb 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -44,10 +44,6 @@ config EHCI_BAR hex default 0xe8000000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/lynxpoint/bootblock.c" diff --git a/src/southbridge/intel/sch/Kconfig b/src/southbridge/intel/sch/Kconfig index 432fb8d566..d320a53332 100644 --- a/src/southbridge/intel/sch/Kconfig +++ b/src/southbridge/intel/sch/Kconfig @@ -30,10 +30,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config HAVE_CMC bool "Add a CMC state machine binary" help |