diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-03 17:21:02 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-05-08 03:04:33 +0000 |
commit | f9de5a4b43f26fc892c1397a900e4c64a6715736 (patch) | |
tree | e3e5ea38f38edcf71b5a887b20f02e902f6cfe4e /src/southbridge/intel | |
parent | c4c2d4ec7ad10d8928929e7042c4e7a1b97e98b8 (diff) | |
download | coreboot-f9de5a4b43f26fc892c1397a900e4c64a6715736.tar.xz |
src/southbridge: Add required space before the open parenthesis
Change-Id: If46db4d210e4b25221436ad1222433d3b00e08e7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26035
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r-- | src/southbridge/intel/bd82x6x/me_8.x.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/me_8.x.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_i89xx/me_8.x.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/me_9.x.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 6463f9632a..54a16ce622 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -864,7 +864,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data) p = &mbp_item_hdr; printk(BIOS_INFO, "ME: MBP item header %8.8x\n", *((u32*)p)); - switch(mbp_item_id) { + switch (mbp_item_id) { case 0x101: SET_UP_COPY(fw_version_name); diff --git a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c index d89502e667..fd8b167772 100644 --- a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c +++ b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c @@ -861,7 +861,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data) p = &mbp_item_hdr; printk(BIOS_INFO, "ME: MBP item header %8.8x\n", *((u32*)p)); - switch(mbp_item_id) { + switch (mbp_item_id) { case 0x101: SET_UP_COPY(fw_version_name); diff --git a/src/southbridge/intel/fsp_i89xx/me_8.x.c b/src/southbridge/intel/fsp_i89xx/me_8.x.c index b094524933..b77cad2aad 100644 --- a/src/southbridge/intel/fsp_i89xx/me_8.x.c +++ b/src/southbridge/intel/fsp_i89xx/me_8.x.c @@ -816,7 +816,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data) p = &mbp_item_hdr; printk(BIOS_INFO, "ME: MBP item header %8.8x\n", *((u32*)p)); - switch(mbp_item_id) { + switch (mbp_item_id) { case 0x101: SET_UP_COPY(fw_version_name); diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index c393feb377..61684985a8 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -1016,7 +1016,7 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data, device_t dev) for (i = 0; i < mbp->header.mbp_size - 1;) { mbp_item_header *item = (void *)&mbp->data[i]; - switch(MBP_MAKE_IDENT(item->app_id, item->item_id)) { + switch (MBP_MAKE_IDENT(item->app_id, item->item_id)) { case MBP_IDENT(KERNEL, FW_VER): ASSIGN_FIELD_PTR(fw_version_name, &mbp->data[i+1]); |