ck804 whitespace fixes

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 123 insertions, 123 deletions

diff --git a/src/southbridge/nvidia/ck804/ck804_lpc.c b/src/southbridge/nvidia/ck804/ck804_lpc.c
index 369b70a5aa..69afb182ae 100644
--- a/src/southbridge/nvidia/ck804/ck804_lpc.c
+++ b/src/southbridge/nvidia/ck804/ck804_lpc.c
@@ -94,7 +94,7 @@ static void setup_ioapic(unsigned long ioapic_base)
 			printk_warning("IO APIC not responding.\n");
 			return;
 		}
-		printk_spew("for IRQ, reg 0x%08x value 0x%08x 0x%08x\n", 
+		printk_spew("for IRQ, reg 0x%08x value 0x%08x 0x%08x\n",
 			    a->reg, a->value_low, a->value_high);
 	}
 }
@@ -113,45 +113,45 @@ static void setup_ioapic(unsigned long ioapic_base)
 
 static void lpc_common_init(device_t dev)
 {
-        uint8_t byte;
-        uint32_t dword; 
-        
-        /* IO APIC initialization */
-        byte = pci_read_config8(dev, 0x74);
-        byte |= (1<<0); // enable APIC
-        pci_write_config8(dev, 0x74, byte);
-        dword = pci_read_config32(dev, PCI_BASE_ADDRESS_1); // 0x14
-                
-        setup_ioapic(dword);
-                
+	uint8_t byte;
+	uint32_t dword;
+
+	/* IO APIC initialization */
+	byte = pci_read_config8(dev, 0x74);
+	byte |= (1<<0); // enable APIC
+	pci_write_config8(dev, 0x74, byte);
+	dword = pci_read_config32(dev, PCI_BASE_ADDRESS_1); // 0x14
+
+	setup_ioapic(dword);
+
 #if 1
-        dword = pci_read_config32(dev, 0xe4);
-        dword |= (1<<23);
-        pci_write_config32(dev, 0xe4, dword);
-#endif 
+	dword = pci_read_config32(dev, 0xe4);
+	dword |= (1<<23);
+	pci_write_config32(dev, 0xe4, dword);
+#endif
 
 }
 
-static void lpc_slave_init(device_t dev) 
+static void lpc_slave_init(device_t dev)
 {
 	lpc_common_init(dev);
 }
 
 static void rom_dummy_write(device_t dev){
-        uint8_t old, new;
+	uint8_t old, new;
 	uint8_t *p;
-        
-        old = pci_read_config8(dev, 0x88);
-        new = old | 0xc0;
-        if (new != old) {
-                pci_write_config8(dev, 0x88, new); 
-        }
+
+	old = pci_read_config8(dev, 0x88);
+	new = old | 0xc0;
+	if (new != old) {
+		pci_write_config8(dev, 0x88, new);
+	}
 	//  enable write
-        old = pci_read_config8(dev, 0x6d);
-        new = old | 0x01;
-        if (new != old) {
-	        pci_write_config8(dev, 0x6d, new);
-        }
+	old = pci_read_config8(dev, 0x6d);
+	new = old | 0x01;
+	if (new != old) {
+		pci_write_config8(dev, 0x6d, new);
+	}
 
 	/* dummy write */
 	p = (uint8_t *)0xffffffe0;
@@ -160,22 +160,22 @@ static void rom_dummy_write(device_t dev){
 	old = *p;
 
 	//  disable write
-        old = pci_read_config8(dev, 0x6d);
-        new = old & 0xfe;
-        if (new != old) {
-                pci_write_config8(dev, 0x6d, new);
+	old = pci_read_config8(dev, 0x6d);
+	new = old & 0xfe;
+	if (new != old) {
+		pci_write_config8(dev, 0x6d, new);
 
-        }
+	}
 
 }
 #if 0
 static void enable_hpet(struct device *dev)
 {
-        unsigned long hpet_address;
+	unsigned long hpet_address;
 
-        pci_write_config32(dev,0x44, 0xfed00001);
-        hpet_address=pci_read_config32(dev,0x44)& 0xfffffffe;
-        printk_debug("enabling HPET @0x%x\n", hpet_address);
+	pci_write_config32(dev,0x44, 0xfed00001);
+	hpet_address=pci_read_config32(dev,0x44)& 0xfffffffe;
+	printk_debug("enabling HPET @0x%x\n", hpet_address);
 }
 #endif
 
@@ -195,34 +195,34 @@ static void lpc_init(device_t dev)
 #if 0
 	/* posted memory write enable */
 	byte = pci_read_config8(dev, 0x46);
-	pci_write_config8(dev, 0x46, byte | (1<<0)); 
+	pci_write_config8(dev, 0x46, byte | (1<<0));
 
 #endif
 	/* power after power fail */
 
-        on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
-        get_option(&on, "power_on_after_fail");
-        byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
-        byte &= ~0x40;
-        if (!on) {
-                byte |= 0x40;
-        }
-        pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
-        printk_info("set power %s after power fail\n", on?"on":"off");
-
-        /* Throttle the CPU speed down for testing */
-        on = SLOW_CPU_OFF;
-        get_option(&on, "slow_cpu");
-        if(on) {
+	on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+	get_option(&on, "power_on_after_fail");
+	byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
+	byte &= ~0x40;
+	if (!on) {
+		byte |= 0x40;
+	}
+	pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
+	printk_info("set power %s after power fail\n", on?"on":"off");
+
+	/* Throttle the CPU speed down for testing */
+	on = SLOW_CPU_OFF;
+	get_option(&on, "slow_cpu");
+	if(on) {
 		uint16_t pm10_bar;
 		uint32_t dword;
-                pm10_bar = (pci_read_config16(dev, 0x60)&0xff00);
-                outl(((on<<1)+0x10)  ,(pm10_bar + 0x10));
-                dword = inl(pm10_bar + 0x10);
-                on = 8-on;
-                printk_debug("Throttling CPU %2d.%1.1d percent.\n",
-                                (on*12)+(on>>1),(on&1)*5);
-        }
+		pm10_bar = (pci_read_config16(dev, 0x60)&0xff00);
+		outl(((on<<1)+0x10)  ,(pm10_bar + 0x10));
+		dword = inl(pm10_bar + 0x10);
+		on = 8-on;
+		printk_debug("Throttling CPU %2d.%1.1d percent.\n",
+				(on*12)+(on>>1),(on&1)*5);
+	}
 
 #if 0
 // default is enabled
@@ -243,7 +243,7 @@ static void lpc_init(device_t dev)
 	byte_old = byte;
 	nmi_option = NMI_OFF;
 	get_option(&nmi_option, "nmi");
-	if (nmi_option) {			
+	if (nmi_option) {
 		byte &= ~(1 << 7); /* set NMI */
 	} else {
 		byte |= ( 1 << 7); // Can not mask NMI from PCI-E and NMI_NOW
@@ -251,18 +251,18 @@ static void lpc_init(device_t dev)
 	if( byte != byte_old) {
 		outb(0x70, byte);
 	}
-	
+
 	/* Initialize the real time clock */
 	rtc_init(0);
 
 	/* Initialize isa dma */
 	isa_dma_init();
 
-        /* Initialize the High Precision Event Timers */
-//        enable_hpet(dev);
+	/* Initialize the High Precision Event Timers */
+//	enable_hpet(dev);
 
 	rom_dummy_write(dev);
-	
+
 }
 
 static void ck804_lpc_read_resources(device_t dev)
@@ -271,66 +271,66 @@ static void ck804_lpc_read_resources(device_t dev)
 	unsigned long index;
 
 	/* Get the normal pci resources of this device */
-	pci_dev_read_resources(dev); // We got one for APIC, or one more for TRAP		
-	
-	/* Get Resource for ACPI, SYSTEM_CONTROL, ANALOG_CONTROL */	
-	for (index = 0x60; index <= 0x68; index+=4) { // We got another 3.		
-		pci_get_resource(dev, index);	
-	}	
-	compact_resources(dev);	
-
-        /* Add an extra subtractive resource for both memory and I/O */
-        res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-        res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-        
-        res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-        res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+	pci_dev_read_resources(dev); // We got one for APIC, or one more for TRAP
+
+	/* Get Resource for ACPI, SYSTEM_CONTROL, ANALOG_CONTROL */
+	for (index = 0x60; index <= 0x68; index+=4) { // We got another 3.
+		pci_get_resource(dev, index);
+	}
+	compact_resources(dev);
+
+	/* Add an extra subtractive resource for both memory and I/O */
+	res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
+	res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+
+	res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
+	res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
 }
 
-/**     
+/**
  * @brief Enable resources for children devices
- *      
+ *
  * @param dev the device whos children's resources are to be enabled
- *      
+ *
  * This function is call by the global enable_resources() indirectly via the
  * device_operation::enable_resources() method of devices.
- *      
+ *
  * Indirect mutual recursion:
  *      enable_childrens_resources() -> enable_resources()
  *      enable_resources() -> device_operation::enable_resources()
  *      device_operation::enable_resources() -> enable_children_resources()
- */     
+ */
 static void ck804_lpc_enable_childrens_resources(device_t dev)
-{       
-        unsigned link; 
+{
+	unsigned link;
 	uint32_t reg, reg_var[4];
 	int i;
 	int var_num = 0;
-	
+
 	reg = pci_read_config32(dev, 0xa0);
 
-        for (link = 0; link < dev->links; link++) {
-                device_t child;
-                for (child = dev->link[link].children; child; child = child->sibling) {
-                        enable_resources(child);
+	for (link = 0; link < dev->links; link++) {
+		device_t child;
+		for (child = dev->link[link].children; child; child = child->sibling) {
+			enable_resources(child);
 			if(child->have_resources && (child->path.type == DEVICE_PATH_PNP)) {
 				for(i=0;i<child->resources;i++) {
 					struct resource *res;
-			                unsigned long base, end; // don't need long long
+					unsigned long base, end; // don't need long long
 					res = &child->resource[i];
 					if(!(res->flags & IORESOURCE_IO)) continue;
-		        	        base = res->base;
-                			end = resource_end(res);
+					base = res->base;
+					end = resource_end(res);
 					printk_debug("ck804 lpc decode:%s, base=0x%08x, end=0x%08x\r\n",dev_path(child),base, end);
 					switch(base) {
 					case 0x3f8: // COM1
 						reg |= (1<<0); 	break;
 					case 0x2f8: // COM2
-						reg |= (1<<1);  break; 
+						reg |= (1<<1);  break;
 					case 0x378: // Parallal 1
 						reg |= (1<<24); break;
-					case 0x3f0: // FD0 
+					case 0x3f0: // FD0
 						reg |= (1<<20); break;
 					case 0x220:  // Aduio 0
 						reg |= (1<<8); 	break;
@@ -341,33 +341,33 @@ static void ck804_lpc_enable_childrens_resources(device_t dev)
 						if(var_num>=4) continue; // only 4 var ; compact them ?
 						reg |= (1<<(28+var_num));
 						reg_var[var_num++] = (base & 0xffff)|((end & 0xffff)<<16);
-					}	
+					}
 				}
 			}
-                }
-        }
+		}
+	}
 	pci_write_config32(dev, 0xa0, reg);
 	for(i=0;i<var_num;i++) {
 		pci_write_config32(dev, 0xa8 + i*4, reg_var[i]);
-	}	
-	
+	}
+
 
 }
 
 static void ck804_lpc_enable_resources(device_t dev)
 {
-        pci_dev_enable_resources(dev);
-        ck804_lpc_enable_childrens_resources(dev);
+	pci_dev_enable_resources(dev);
+	ck804_lpc_enable_childrens_resources(dev);
 }
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
-        pci_write_config32(dev, 0x40,
-                ((device & 0xffff) << 16) | (vendor & 0xffff));
+	pci_write_config32(dev, 0x40,
+		((device & 0xffff) << 16) | (vendor & 0xffff));
 }
 
 static struct pci_operations lops_pci = {
-        .set_subsystem = lpci_set_subsystem,
+	.set_subsystem = lpci_set_subsystem,
 };
 
 static struct device_operations lpc_ops  = {
@@ -386,30 +386,30 @@ static const struct pci_driver lpc_driver __pci_driver = {
 };
 
 static const struct pci_driver lpc_driver_pro __pci_driver = {
-        .ops    = &lpc_ops,
-        .vendor = PCI_VENDOR_ID_NVIDIA,
-        .device = PCI_DEVICE_ID_NVIDIA_CK804_PRO,
+	.ops    = &lpc_ops,
+	.vendor = PCI_VENDOR_ID_NVIDIA,
+	.device = PCI_DEVICE_ID_NVIDIA_CK804_PRO,
 };
 
 #if CK804_CHIP_REV == 1
 static const struct pci_driver lpc_driver_slave __pci_driver = {
-        .ops    = &lpc_ops,
-        .vendor = PCI_VENDOR_ID_NVIDIA,
-        .device = PCI_DEVICE_ID_NVIDIA_CK804_SLAVE,
+	.ops    = &lpc_ops,
+	.vendor = PCI_VENDOR_ID_NVIDIA,
+	.device = PCI_DEVICE_ID_NVIDIA_CK804_SLAVE,
 };
-#else 
+#else
 static struct device_operations lpc_slave_ops  = {
-        .read_resources   = ck804_lpc_read_resources,
-        .set_resources    = pci_dev_set_resources,
-        .enable_resources = pci_dev_enable_resources,
-        .init             = lpc_slave_init,
-//        .enable           = ck804_enable,
+	.read_resources   = ck804_lpc_read_resources,
+	.set_resources    = pci_dev_set_resources,
+	.enable_resources = pci_dev_enable_resources,
+	.init             = lpc_slave_init,
+//	.enable           = ck804_enable,
 	.ops_pci          = &lops_pci,
 };
 
 static const struct pci_driver lpc_driver_slave __pci_driver = {
-        .ops    = &lpc_slave_ops,
-        .vendor = PCI_VENDOR_ID_NVIDIA,
-        .device = PCI_DEVICE_ID_NVIDIA_CK804_SLAVE,
-};   
-#endif         
+	.ops    = &lpc_slave_ops,
+	.vendor = PCI_VENDOR_ID_NVIDIA,
+	.device = PCI_DEVICE_ID_NVIDIA_CK804_SLAVE,
+};
+#endif