diff options
| author | Yinghai Lu <yinghai.lu@amd.com> | 2007-02-01 00:10:05 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2007-02-01 00:10:05 +0000 |
| commit | c65bd562a8653cdf7e273917a9f5dcea1f5f99b7 (patch) | |
| tree | 4a4fbc4a4cd005c99c49c93efa48c8e3653ad39e /src/southbridge/nvidia/mcp55/chip.h | |
| parent | 097d9a2d57fce2bd1bbe0d9c3628b75c1a25a934 (diff) | |
| download | coreboot-c65bd562a8653cdf7e273917a9f5dcea1f5f99b7.tar.xz | |
Add support for the NVIDIA MCP55 southbridge.
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia/mcp55/chip.h')
| -rw-r--r-- | src/southbridge/nvidia/mcp55/chip.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/southbridge/nvidia/mcp55/chip.h b/src/southbridge/nvidia/mcp55/chip.h new file mode 100644 index 0000000000..1bb0f5faa5 --- /dev/null +++ b/src/southbridge/nvidia/mcp55/chip.h @@ -0,0 +1,37 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef MCP55_CHIP_H +#define MCP55_CHIP_H + +struct southbridge_nvidia_mcp55_config +{ + unsigned int ide0_enable : 1; + unsigned int ide1_enable : 1; + unsigned int sata0_enable : 1; + unsigned int sata1_enable : 1; + unsigned int mac_eeprom_smbus; + unsigned int mac_eeprom_addr; +}; +struct chip_operations; +extern struct chip_operations southbridge_nvidia_mcp55_ops; + +#endif /* MCP55_CHIP_H */ |