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author | Duncan Laurie <dlaurie@chromium.org> | 2015-09-03 16:19:42 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-10 09:48:47 +0000 |
commit | 44b01fdcd7bbd7e619f496530d3bfbea69f7fce9 (patch) | |
tree | 732aee3d78a4ac8d51e96795d5578c5580571f3b /src/southbridge/nvidia/mcp55/ide.c | |
parent | e067083d08b391882c7a773d0a70073d28dc17b4 (diff) | |
download | coreboot-44b01fdcd7bbd7e619f496530d3bfbea69f7fce9.tar.xz |
glados: Misc code cleanups
- romstage.c is using gpio_configure_pads so it should really
include soc/gpio.h instead of relying on it to come from "gpio.h"
- consistent formatting of array initializers in pei_data.c
- remove pei_data->ec_present flag as this is unused in skylake
- fix printk level in spd/spd.c to be BIOS_INFO instead of BIOS_ERR
- clean up acpi_slp_type usage in ec.c, remove unnecessary post
codes, and cleaner console output message.
BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-glados coreboot
Change-Id: I0f76a560dc2c4197e66999752c52573ff0278430
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 67c29f900b7709b73bd0d1e0da26f96cca32828b
Original-Change-Id: Ia2a320acf879fa85e9f6b06265cfe38e50e51e46
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297744
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11568
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/nvidia/mcp55/ide.c')
0 files changed, 0 insertions, 0 deletions