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authorArne Georg Gleditsch <arne.gleditsch@numascale.com>2010-09-13 15:11:35 +0000
committerMyles Watson <mylesgw@gmail.com>2010-09-13 15:11:35 +0000
commite7a5b76a748a27b033122b55356661b79839874c (patch)
tree586b516fe026b39a719f1c54cd04c4ced0b00878 /src/southbridge/nvidia/mcp55
parentd09d1f7846d546f1790cd9db107014ffec92cc27 (diff)
downloadcoreboot-e7a5b76a748a27b033122b55356661b79839874c.tar.xz
Move initialization of MMCONF BAR to cache_as_ram setup phase, in order
to make sure MMCONF is set up before use. Otherwise, PCI config accesses run before init_cpus() will be lost if MMCONF is enabled (unless explicitly done as port-based accesses). This obsoletes removal of RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78) in mcp55_early_setup, so reinsert. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia/mcp55')
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
index e01630dc05..6a453cbfea 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
@@ -267,13 +267,7 @@ static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, unsigned *devn
RES_PCI_IO, PCI_ADDR(0, 6, 0, 0x74), 0xFFFFFFC0, 0x00000000,
RES_PCI_IO, PCI_ADDR(0, 6, 0, 0xC0), 0x00000000, 0xCB8410DE,
RES_PCI_IO, PCI_ADDR(0, 6, 0, 0xC4), 0xFFFFFFF8, 0x00000007,
- /* The following operation hangs when performed via MMCFG:
- pci_read_config32(romcc): 00010000:0078: 20040000
- setup_resource_map_x_offset: 10000, 78: 20040000
- pci_write_config32(romcc): 00010000:0078: 19040000
- (hang)
- Response missing? */
- /* RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000, */
+ RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000,
#if MCP55_USE_AZA == 1
RES_PCI_IO, PCI_ADDR(0, 6, 1, 0x40), 0x00000000, 0xCB8410DE,