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| author | Yinghai Lu <yinghai.lu@amd.com> | 2007-09-14 14:58:33 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2007-09-14 14:58:33 +0000 |
| commit | 18c70d7222bcea65d08e1ff879d8f69f2705e7ab (patch) | |
| tree | cea44a5202a4bcaffd52533c76fb2d33ab1fb664 /src/southbridge/nvidia | |
| parent | 3335adb771c5e6bf2fb200285a8af7134446bb71 (diff) | |
| download | coreboot-18c70d7222bcea65d08e1ff879d8f69f2705e7ab.tar.xz | |
More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE.
For example: in C51/MCP55 or C51/MCP51
Will allow
1. C51 at 0x10 to 0x14, and MCP at 0 to 4
2. C51 at 1 to 4, and MCP at 7 to 0x0a
The reason is c51/mcp51/mcp55 reported unitid is 0x0f (far beyond it
needed), and will prevent us from putting them on bus 0.
Typical values for c51/mcp55 or c51/mcp51:
HT_CHAIN_UNITID_BASE = 0x10 # for C51
HT_CHAIN_END_UNITID_BASE = 0 # for mcp
If only have mcp with c51,
HT_CHAIN_UNITID_BASE = 0 # for MCP
#HT_CHAIN_END_UNITID_BASE = 0 # default value 0x20
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia')
| -rw-r--r-- | src/southbridge/nvidia/mcp55/mcp55_enable_rom.c | 2 | ||||
| -rw-r--r-- | src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/nvidia/mcp55/mcp55_enable_rom.c b/src/southbridge/nvidia/mcp55/mcp55_enable_rom.c index 6a2697537e..f18edb74a3 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_enable_rom.c +++ b/src/southbridge/nvidia/mcp55/mcp55_enable_rom.c @@ -21,7 +21,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE +#if HT_CHAIN_END_UNITID_BASE != 0x20 #define MCP55_DEVN_BASE HT_CHAIN_END_UNITID_BASE #else #define MCP55_DEVN_BASE HT_CHAIN_UNITID_BASE diff --git a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c index c431724c5c..ac4e42ab8d 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c +++ b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c @@ -21,7 +21,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE +#if HT_CHAIN_END_UNITID_BASE != 0x20 #define MCP55_DEVN_BASE HT_CHAIN_END_UNITID_BASE #else #define MCP55_DEVN_BASE HT_CHAIN_UNITID_BASE |