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authorUwe Hermann <uwe@hermann-uwe.de>2007-09-25 01:31:35 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-09-25 01:31:35 +0000
commitf845e02edbb1052eb9d2c5a4a6fb85f4e7c1b975 (patch)
tree155370ca3e11aa112abc97430ccc5ee354ecd55e /src/southbridge/nvidia
parent48cac24742300f8225b3194bc8d4f3f119f633e5 (diff)
downloadcoreboot-f845e02edbb1052eb9d2c5a4a6fb85f4e7c1b975.tar.xz
As per suggestion from Yinghai Lu <yinghailu@gmail.com> this patch
fixes the problems with PCI add-on cards not being detected or initialized on MCP55-based systems (PCI bridge decoding change). I have tested this on the MSI MS-7260 (K9N Neo) with a PCI VGA card, which worked fine in any of the three PCI slots. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
index 99124da6b9..d60160b329 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
@@ -271,6 +271,8 @@ static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, unsigned *devn
RES_PCI_IO, PCI_ADDR(0, 6, 0, 0xC0), 0x00000000, 0xCB8410DE,
RES_PCI_IO, PCI_ADDR(0, 6, 0, 0xC4), 0xFFFFFFF8, 0x00000007,
+ RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000,
+
#if MCP55_USE_AZA == 1
RES_PCI_IO, PCI_ADDR(0, 6, 1, 0x40), 0x00000000, 0xCB8410DE,
@@ -294,8 +296,6 @@ static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, unsigned *devn
RES_PORT_IO_32, ACPICTRL_IO_BASE + 0x80, 0xEFFFFFF, 0x01000000,
- RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000,
-
//Master MCP55 ????YHLU
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 0, ~(3<<2), (0<<2),