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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-11-27 16:55:13 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-11-27 16:55:13 +0000
commit436f99b72a75e38c4a1558a23642ea838e621745 (patch)
tree2030053c23283ddee57d7019d364e408cbb278d9 /src/southbridge/nvidia
parentc58290c2ff3a77ebca00d9d2edbe005d6e950e0f (diff)
downloadcoreboot-436f99b72a75e38c4a1558a23642ea838e621745.tar.xz
Eliminate special case id.inc/id.lds in favor of a configuration variable ID_SECTION_OFFSET
which is normally set to 0x10 (the current default) and set to 0x80 (the current alternative) where necessary (if romstraps get in the way). For Kconfig, the special case is set per southbridge (as these define the necessity for this workaround), for newconfig it's added to each single board. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/ck804/Kconfig4
-rw-r--r--src/southbridge/nvidia/ck804/id.inc15
-rw-r--r--src/southbridge/nvidia/ck804/id.lds6
-rw-r--r--src/southbridge/nvidia/mcp55/Kconfig4
-rw-r--r--src/southbridge/nvidia/mcp55/id.inc36
-rw-r--r--src/southbridge/nvidia/mcp55/id.lds27
6 files changed, 8 insertions, 84 deletions
diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig
index 92c8fbabdc..810b5b852f 100644
--- a/src/southbridge/nvidia/ck804/Kconfig
+++ b/src/southbridge/nvidia/ck804/Kconfig
@@ -3,3 +3,7 @@ config SOUTHBRIDGE_NVIDIA_CK804
select HAVE_HARD_RESET
select IOAPIC
+config ID_SECTION_OFFSET
+ hex
+ default 0x80 if SOUTHBRIDGE_NVIDIA_CK804
+
diff --git a/src/southbridge/nvidia/ck804/id.inc b/src/southbridge/nvidia/ck804/id.inc
deleted file mode 100644
index 3200a7d7de..0000000000
--- a/src/southbridge/nvidia/ck804/id.inc
+++ /dev/null
@@ -1,15 +0,0 @@
- .section ".id", "a", @progbits
-
- .globl __id_start
-__id_start:
-vendor:
- .asciz CONFIG_MAINBOARD_VENDOR
-part:
- .asciz CONFIG_MAINBOARD_PART_NUMBER
-.long __id_end + 0x80 - vendor /* Reverse offset to the vendor ID */
-.long __id_end + 0x80 - part /* Reverse offset to the part number */
-.long CONFIG_ROM_SIZE /* Size of this ROM image */
- .globl __id_end
-
-__id_end:
-.previous
diff --git a/src/southbridge/nvidia/ck804/id.lds b/src/southbridge/nvidia/ck804/id.lds
deleted file mode 100644
index d95b9afcf4..0000000000
--- a/src/southbridge/nvidia/ck804/id.lds
+++ /dev/null
@@ -1,6 +0,0 @@
-SECTIONS {
- . = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start);
- .id (.): {
- *(.id)
- }
-}
diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig
index d0fc94bfba..96e2ebc942 100644
--- a/src/southbridge/nvidia/mcp55/Kconfig
+++ b/src/southbridge/nvidia/mcp55/Kconfig
@@ -1,2 +1,6 @@
config SOUTHBRIDGE_NVIDIA_MCP55
bool
+
+config ID_SECTION_OFFSET
+ hex
+ default 0x80 if SOUTHBRIDGE_NVIDIA_MCP55
diff --git a/src/southbridge/nvidia/mcp55/id.inc b/src/southbridge/nvidia/mcp55/id.inc
deleted file mode 100644
index 7ea744c302..0000000000
--- a/src/southbridge/nvidia/mcp55/id.inc
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
- .section ".id", "a", @progbits
-
- .globl __id_start
-__id_start:
-vendor:
- .asciz CONFIG_MAINBOARD_VENDOR
-part:
- .asciz CONFIG_MAINBOARD_PART_NUMBER
-.long __id_end + 0x80 - vendor /* Reverse offset to the vendor id */
-.long __id_end + 0x80 - part /* Reverse offset to the part number */
-.long CONFIG_ROM_SIZE /* Size of this romimage */
- .globl __id_end
-
-__id_end:
-.previous
diff --git a/src/southbridge/nvidia/mcp55/id.lds b/src/southbridge/nvidia/mcp55/id.lds
deleted file mode 100644
index 53215beb63..0000000000
--- a/src/southbridge/nvidia/mcp55/id.lds
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-SECTIONS {
- . = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start);
- .id (.): {
- *(.id)
- }
-}