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authorPatrick Georgi <patrick@georgi-clan.de>2012-05-05 15:29:32 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-05-08 00:34:34 +0200
commite166782f397f7db2c4446c5e120fa30afbde7bdd (patch)
treefac736e744d9ec6d49e321e63971277e611d2000 /src/southbridge/nvidia
parentfe4221848f86ab97d2c439299826d97e48542404 (diff)
downloadcoreboot-e166782f397f7db2c4446c5e120fa30afbde7bdd.tar.xz
Clean up #ifs
Replace #if CONFIG_FOO==1 with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1[[:space:]]*\$,#if \1," {} + Replace #if (CONFIG_FOO==1) with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1)[[:space:]]*\$,#if \1," {} + Replace #if CONFIG_FOO==0 with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0[[:space:]]*\$,#if \!\1," {} + Replace #if (CONFIG_FOO==0) with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0)[[:space:]]*\$,#if \!\1," {} + (and some manual changes to fix false positives) Change-Id: Iac6ca7605a5f99885258cf1a9a2473a92de27c42 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1004 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Martin Roth <martin@se-eng.com>
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/ck804/early_setup.c2
-rw-r--r--src/southbridge/nvidia/ck804/early_setup_car.c2
-rw-r--r--src/southbridge/nvidia/ck804/ide.c2
-rw-r--r--src/southbridge/nvidia/ck804/nic.c2
-rw-r--r--src/southbridge/nvidia/mcp55/ide.c2
-rw-r--r--src/southbridge/nvidia/mcp55/nic.c2
-rw-r--r--src/southbridge/nvidia/mcp55/smbus.c4
7 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/nvidia/ck804/early_setup.c b/src/southbridge/nvidia/ck804/early_setup.c
index dfe9ff2233..505d059c05 100644
--- a/src/southbridge/nvidia/ck804/early_setup.c
+++ b/src/southbridge/nvidia/ck804/early_setup.c
@@ -82,7 +82,7 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control,
#define CK804_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE
#endif
-#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
+#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
#define CK804B_DEVN_BASE 1
#else
#define CK804B_DEVN_BASE CK804_DEVN_BASE
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c
index bb0fd13d18..efe1b99ce4 100644
--- a/src/southbridge/nvidia/ck804/early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/early_setup_car.c
@@ -72,7 +72,7 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control,
#define CK804_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE
#endif
-#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
+#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
#define CK804B_DEVN_BASE 1
#else
#define CK804B_DEVN_BASE CK804_DEVN_BASE
diff --git a/src/southbridge/nvidia/ck804/ide.c b/src/southbridge/nvidia/ck804/ide.c
index ac94acbbed..c7236ec635 100644
--- a/src/southbridge/nvidia/ck804/ide.c
+++ b/src/southbridge/nvidia/ck804/ide.c
@@ -60,7 +60,7 @@ static void ide_init(struct device *dev)
dword |= 12;
pci_write_config32(dev, 0xf8, dword);
-#if CONFIG_PCI_ROM_RUN == 1
+#if CONFIG_PCI_ROM_RUN
pci_dev_init(dev);
#endif
}
diff --git a/src/southbridge/nvidia/ck804/nic.c b/src/southbridge/nvidia/ck804/nic.c
index ca6cd94caa..c62728addd 100644
--- a/src/southbridge/nvidia/ck804/nic.c
+++ b/src/southbridge/nvidia/ck804/nic.c
@@ -108,7 +108,7 @@ static void nic_init(struct device *dev)
nic_index++;
-#if CONFIG_PCI_ROM_RUN == 1
+#if CONFIG_PCI_ROM_RUN
pci_dev_init(dev); /* It will init Option ROM. */
#endif
}
diff --git a/src/southbridge/nvidia/mcp55/ide.c b/src/southbridge/nvidia/mcp55/ide.c
index 0677a75f58..6d0cebf193 100644
--- a/src/southbridge/nvidia/mcp55/ide.c
+++ b/src/southbridge/nvidia/mcp55/ide.c
@@ -61,7 +61,7 @@ static void ide_init(struct device *dev)
dword = pci_read_config32(dev, 0xf8);
dword |= 12;
pci_write_config32(dev, 0xf8, dword);
-#if CONFIG_PCI_ROM_RUN == 1
+#if CONFIG_PCI_ROM_RUN
pci_dev_init(dev);
#endif
}
diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c
index d74f10d247..0521b891aa 100644
--- a/src/southbridge/nvidia/mcp55/nic.c
+++ b/src/southbridge/nvidia/mcp55/nic.c
@@ -180,7 +180,7 @@ static void nic_init(struct device *dev)
nic_index++;
-#if CONFIG_PCI_ROM_RUN == 1
+#if CONFIG_PCI_ROM_RUN
pci_dev_init(dev);// it will init option rom
#endif
diff --git a/src/southbridge/nvidia/mcp55/smbus.c b/src/southbridge/nvidia/mcp55/smbus.c
index 3b11dd3633..a945f237d0 100644
--- a/src/southbridge/nvidia/mcp55/smbus.c
+++ b/src/southbridge/nvidia/mcp55/smbus.c
@@ -94,7 +94,7 @@ static struct smbus_bus_operations lops_smbus_bus = {
.write_byte = lsmbus_write_byte,
};
-#if CONFIG_GENERATE_ACPI_TABLES == 1
+#if CONFIG_GENERATE_ACPI_TABLES
unsigned pm_base;
#endif
@@ -113,7 +113,7 @@ static void mcp55_sm_read_resources(device_t dev)
static void mcp55_sm_init(device_t dev)
{
-#if CONFIG_GENERATE_ACPI_TABLES == 1
+#if CONFIG_GENERATE_ACPI_TABLES
struct resource *res;
res = find_resource(dev, 0x60);