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authorStefan Reinauer <stepan@coresystems.de>2010-07-08 16:41:05 +0000
committerStefan Reinauer <stepan@openbios.org>2010-07-08 16:41:05 +0000
commit6f57b514cb6e0598b295a3d8a4345dd42209e1e6 (patch)
treebb54404f902b1339bdba36523d4ba069628b5532 /src/southbridge/nvidia
parent817d7542f708215c4128b6cdc39ca7d7e1256b26 (diff)
downloadcoreboot-6f57b514cb6e0598b295a3d8a4345dd42209e1e6.tar.xz
Fix all warnings in the tree
(does not fix the cmos.layout race yet) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5660 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55.h5
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_early_ctrl.c3
2 files changed, 6 insertions, 2 deletions
diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h
index 2f6e9d284f..687232f302 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.h
+++ b/src/southbridge/nvidia/mcp55/mcp55.h
@@ -24,6 +24,9 @@
#include "chip.h"
+#ifndef __PRE_RAM__
void mcp55_enable(device_t dev);
-
+#else
+void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
+#endif
#endif /* MCP55_H */
diff --git a/src/southbridge/nvidia/mcp55/mcp55_early_ctrl.c b/src/southbridge/nvidia/mcp55/mcp55_early_ctrl.c
index 3b5a507538..5c5f07c81a 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_early_ctrl.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_early_ctrl.c
@@ -20,6 +20,7 @@
*/
#include <reset.h>
+#include "mcp55.h"
static unsigned get_sbdn(unsigned bus)
{
@@ -52,7 +53,7 @@ void hard_reset(void)
outb(0x0e, 0x0cf9);
}
-static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
+void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
{
/* default value for mcp55 is good */
/* set VFSMAF ( VID/FID System Management Action Field) to 2 */