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authorLuc Verhaegen <libv@skynet.be>2009-06-03 14:19:33 +0000
committerLuc Verhaegen <libv@skynet.be>2009-06-03 14:19:33 +0000
commita9c5ea08d07d343d32d4c083a232107bd84d8064 (patch)
treefbe58f136039f1c35ab5fea76fcd7970b63a3a3e /src/southbridge/nvidia
parent9efecc5408cb72d5e547736cba90c1814539a10c (diff)
downloadcoreboot-a9c5ea08d07d343d32d4c083a232107bd84d8064.tar.xz
Revert "CMOS: Add set_option and rework get_option."
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. Stepan pointed out that "s" means string, which makes the following statement in this commit message invalid: "Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go." Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/ck804/ck804_lpc.c8
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_lpc.c10
2 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804_lpc.c b/src/southbridge/nvidia/ck804/ck804_lpc.c
index 098e8d020e..db7c29ba84 100644
--- a/src/southbridge/nvidia/ck804/ck804_lpc.c
+++ b/src/southbridge/nvidia/ck804/ck804_lpc.c
@@ -179,7 +179,7 @@ unsigned pm_base=0;
static void lpc_init(device_t dev)
{
uint8_t byte, byte_old;
- uint32_t on, nmi_option;
+ int on, nmi_option;
lpc_common_init(dev);
@@ -199,7 +199,7 @@ static void lpc_init(device_t dev)
/* power after power fail */
on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
- get_option("power_on_after_fail", &on);
+ get_option(&on, "power_on_after_fail");
byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
byte &= ~0x40;
if (!on)
@@ -209,7 +209,7 @@ static void lpc_init(device_t dev)
/* Throttle the CPU speed down for testing. */
on = SLOW_CPU_OFF;
- get_option("slow_cpu", &on);
+ get_option(&on, "slow_cpu");
if (on) {
uint16_t pm10_bar;
uint32_t dword;
@@ -238,7 +238,7 @@ static void lpc_init(device_t dev)
byte = inb(0x70); /* RTC70 */
byte_old = byte;
nmi_option = NMI_OFF;
- get_option("nmi", &nmi_option);
+ get_option(&nmi_option, "nmi");
if (nmi_option) {
byte &= ~(1 << 7); /* Set NMI. */
} else {
diff --git a/src/southbridge/nvidia/mcp55/mcp55_lpc.c b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
index 6a70b6e6c3..3cfcd57a71 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_lpc.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
@@ -170,8 +170,8 @@ static void lpc_init(device_t dev)
{
uint8_t byte;
uint8_t byte_old;
- uint32_t on;
- uint32_t nmi_option;
+ int on;
+ int nmi_option;
lpc_common_init(dev, 1);
@@ -184,7 +184,7 @@ static void lpc_init(device_t dev)
#if 1
on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
- get_option("power_on_after_fail", &on);
+ get_option(&on, "power_on_after_fail");
byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
byte &= ~0x40;
if (!on) {
@@ -195,7 +195,7 @@ static void lpc_init(device_t dev)
#endif
/* Throttle the CPU speed down for testing */
on = SLOW_CPU_OFF;
- get_option("slow_cpu", &on);
+ get_option(&on, "slow_cpu");
if(on) {
uint16_t pm10_bar;
uint32_t dword;
@@ -225,7 +225,7 @@ static void lpc_init(device_t dev)
byte = inb(0x70); // RTC70
byte_old = byte;
nmi_option = NMI_OFF;
- get_option("nmi", &nmi_option);
+ get_option(&nmi_option, "nmi");
if (nmi_option) {
byte &= ~(1 << 7); /* set NMI */
} else {