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| author | Duncan Laurie <dlaurie@google.com> | 2018-11-20 17:30:47 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-12-04 17:34:38 +0000 |
| commit | 98d7de7ea93379957fc3f48bef6912e9947e1099 (patch) | |
| tree | 5f638ec5330ebe11b4ebf59a9cad0377e690c856 /src/southbridge/nvidia | |
| parent | 106a0823c92593fe35150c5255d9852b9bff9c5d (diff) | |
| download | coreboot-98d7de7ea93379957fc3f48bef6912e9947e1099.tar.xz | |
ec/google/wilco/acpi: Add DPTF support
Add the support needed for DPTF. This includes the methods to
write trip point values, read temperatures, and handle events.
This was tested on a sarien board by inspecting AML debug output
with the kernel while monitoring temperatures and trip points in
sysfs and controlling temperatures with a fan to ensure that when
a trip point is crossed an SCI is generated and the event is
handled properly.
Change-Id: I8d8570d176c0896fa709a6c782b319f58d3c1e52
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/29761
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/nvidia')
0 files changed, 0 insertions, 0 deletions