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| author | Patrick Georgi <patrick@georgi-clan.de> | 2010-11-21 14:38:24 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-11-21 14:38:24 +0000 |
| commit | d8a789f6dfa6a8215ee3f737111e19c265af8f92 (patch) | |
| tree | bfa6d1279a90bae69f39ac64cc24d75a446613cd /src/southbridge/nvidia | |
| parent | 6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23 (diff) | |
| download | coreboot-d8a789f6dfa6a8215ee3f737111e19c265af8f92.tar.xz | |
Move MCP55_PCI_E_X_* to Kconfig. Any useless values in romstage.cs were
not brought over to Kconfig (this applies to all #defines to 4, as
that's the default anyway)
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia')
| -rw-r--r-- | src/southbridge/nvidia/mcp55/Kconfig | 32 | ||||
| -rw-r--r-- | src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c | 15 |
2 files changed, 27 insertions, 20 deletions
diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig index bbb5ab8ed3..78a1f254c5 100644 --- a/src/southbridge/nvidia/mcp55/Kconfig +++ b/src/southbridge/nvidia/mcp55/Kconfig @@ -3,26 +3,46 @@ config SOUTHBRIDGE_NVIDIA_MCP55 select HAVE_USBDEBUG select IOAPIC +if SOUTHBRIDGE_NVIDIA_MCP55 + config ID_SECTION_OFFSET hex - default 0x80 if SOUTHBRIDGE_NVIDIA_MCP55 + default 0x80 config EHCI_BAR hex - default 0xfef00000 if SOUTHBRIDGE_NVIDIA_MCP55 + default 0xfef00000 config EHCI_DEBUG_OFFSET hex - default 0x98 if SOUTHBRIDGE_NVIDIA_MCP55 + default 0x98 config MCP55_USE_NIC bool - default n if SOUTHBRIDGE_NVIDIA_MCP55 + default n config MCP55_USE_AZA bool - default n if SOUTHBRIDGE_NVIDIA_MCP55 + default n config MCP55_NUM int - default 1 if SOUTHBRIDGE_NVIDIA_MCP55 + default 1 + +config MCP55_PCI_E_X_0 + int + default 4 + +config MCP55_PCI_E_X_1 + int + default 4 + +config MCP55_PCI_E_X_2 + int + default 4 + +config MCP55_PCI_E_X_3 + int + default 4 + +endif diff --git a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c index 773ad7154f..bf778a93fa 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c @@ -76,19 +76,6 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control, con 8 0 4 4 4 8 :5 */ -#ifndef MCP55_PCI_E_X_0 - #define MCP55_PCI_E_X_0 4 -#endif -#ifndef MCP55_PCI_E_X_1 - #define MCP55_PCI_E_X_1 4 -#endif -#ifndef MCP55_PCI_E_X_2 - #define MCP55_PCI_E_X_2 4 -#endif -#ifndef MCP55_PCI_E_X_3 - #define MCP55_PCI_E_X_3 4 -#endif - #define MCP55_CHIP_REV 3 static void mcp55_early_set_port(unsigned mcp55_num, unsigned *busn, unsigned *devn, unsigned *io_base) @@ -370,7 +357,7 @@ static int mcp55_early_setup_x(void) FIXME: May have problem if there is different MCP55 HTX card with different PCI_E lane allocation Need to use same trick about pci1234 to verify node/link connection */ - unsigned pci_e_x[HT_CHAIN_NUM_MAX] = {MCP55_PCI_E_X_0, MCP55_PCI_E_X_1, MCP55_PCI_E_X_2, MCP55_PCI_E_X_3 }; + unsigned pci_e_x[HT_CHAIN_NUM_MAX] = {CONFIG_MCP55_PCI_E_X_0, CONFIG_MCP55_PCI_E_X_1, CONFIG_MCP55_PCI_E_X_2, CONFIG_MCP55_PCI_E_X_3 }; int mcp55_num = 0; unsigned busnx; unsigned devnx; |