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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-06-28 12:18:41 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-07-24 20:09:46 +0200 |
| commit | 9d3e832c727a01350430f08253f1ea0eb51bf73d (patch) | |
| tree | ca39c19fd248fbdd58df66c6d95e967a59a9d5fd /src/southbridge/rdc | |
| parent | df0c8222398f3e0f4334777fb14c6a344c069813 (diff) | |
| download | coreboot-9d3e832c727a01350430f08253f1ea0eb51bf73d.tar.xz | |
bd82x6x: Support power-on-after-power-fail better
Changing CMOS value for power-on-after-power-fail was only honored
after reboot, which is counter intuitive (set from "enable" to
"disable",
power-off, replug device -> device turns on; and similar cases).
Modelled after http://review.coreboot.org/#/c/444
Change-Id: I2b8461dff1ae085c1ea4b4926084268b4da90321
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1323
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/rdc')
0 files changed, 0 insertions, 0 deletions