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| author | Duncan Laurie <dlaurie@google.com> | 2018-12-01 17:00:23 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-12-04 22:50:06 +0000 |
| commit | 1e64d2386a5f281c294666cec59b45f37c40338d (patch) | |
| tree | 92a9b50991550e8d94f21e556f1a2125666a6096 /src/southbridge/ricoh/rl5c476 | |
| parent | 11340e5e1e89011f914d7f3e87bd5d9b004b2587 (diff) | |
| download | coreboot-1e64d2386a5f281c294666cec59b45f37c40338d.tar.xz | |
soc/intel/cannonlake: Add USB device names
Add the ACPI device names for the USB ports to match what
is in the DSDT so USB ports can be defined in the SSDT.
Change-Id: Ibb323bbd324811fa3178b0cba3d7f0a315169486
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/29997
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/ricoh/rl5c476')
0 files changed, 0 insertions, 0 deletions