diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
| commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
| tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/southbridge/ricoh | |
| parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) | |
| download | coreboot-14e22779625de673569c7b950ecc2753fb915b31.tar.xz | |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/ricoh')
| -rw-r--r-- | src/southbridge/ricoh/rl5c476/rl5c476.c | 10 | ||||
| -rw-r--r-- | src/southbridge/ricoh/rl5c476/rl5c476.h | 2 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c index c276389bf7..70d74f5fab 100644 --- a/src/southbridge/ricoh/rl5c476/rl5c476.c +++ b/src/southbridge/ricoh/rl5c476/rl5c476.c @@ -51,7 +51,7 @@ static void rl5c476_init(device_t dev) printk(BIOS_DEBUG, "CF boot not enabled.\n"); return; } - + if (PCI_FUNC(dev->path.pci.devfn) != 1) { // Only configure if second CF slot. return; @@ -154,8 +154,8 @@ static void rl5c476_init(device_t dev) cptr = (unsigned char *)(cf_base + 0x200); printk(BIOS_DEBUG, "CF Config = %x\n",*cptr); - /* Set CF to decode 16 IO bytes on any 16 byte boundary - - * rely on the io windows of the bridge set up above to + /* Set CF to decode 16 IO bytes on any 16 byte boundary - + * rely on the io windows of the bridge set up above to * map those bytes into the addresses for IDE controller 3 * (0x1e8 - 0x1ef and 0x3ed - 0x3ee) */ @@ -167,10 +167,10 @@ static void rl5c476_read_resources(device_t dev) struct resource *resource; - /* For CF socket we need an extra memory window for + /* For CF socket we need an extra memory window for * the control structure of the CF itself */ - if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){ + if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){ /* fake index as it isn't in PCI config space */ resource = new_resource(dev, 1); resource->flags |= IORESOURCE_MEM; diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.h b/src/southbridge/ricoh/rl5c476/rl5c476.h index 2ade87214c..576578bb65 100644 --- a/src/southbridge/ricoh/rl5c476/rl5c476.h +++ b/src/southbridge/ricoh/rl5c476/rl5c476.h @@ -93,5 +93,5 @@ typedef struct pc16reg { u8 smpga0; } __attribute__ ((packed)) pc16reg_t; - + |