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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-11-14 17:57:04 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-11-14 17:57:04 +0000 |
| commit | e13abe53b49fdd61fcf56bc21b578057c5f1c72f (patch) | |
| tree | 4c78dbeae293d155ff5fd75a736c397387a5edb3 /src/southbridge/ricoh | |
| parent | 34153ac0b8ef4d99de1d56b0e8733ae124f2ba0b (diff) | |
| download | coreboot-e13abe53b49fdd61fcf56bc21b578057c5f1c72f.tar.xz | |
Gigabyte M57SLI: Fix watchdog clocksource to be external, not internal.
Reason: The existing code does not tell us why it sets the watchdog
clock at all, but since it appears in cache_as_ram_auto.c instead of
the usual place (Config.lb) there has to be some meaning to it.
Simply do what the proprietary bios does: Use the external clock source.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/ricoh')
0 files changed, 0 insertions, 0 deletions