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authorstepan <stepan@coresystems.de>2010-12-08 05:42:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-12-08 05:42:47 +0000
commit836ae29ee325b1e3d28ff59468cc50913b1e24ce (patch)
treee2691a1e1ee1d795ffe7a99fb93778a9910044c2 /src/southbridge/sis/sis966/ide.c
parent1bc5ccac51d94cfb4f9666ecf2cac619d8dc80a6 (diff)
downloadcoreboot-836ae29ee325b1e3d28ff59468cc50913b1e24ce.tar.xz
first round name simplification. drop the <component>_ prefix.
the prefix was introduced in the early v2 tree many years ago because our old build system "newconfig" could not handle two files with the same name in different paths like /path/to/usb.c and /another/path/to/usb.c correctly. Only one of the files would end up being compiled into the final image. Since Kconfig (actually since shortly before we switched to Kconfig) we don't suffer from that problem anymore. So we could drop the sb700_ prefix from all those filenames (or, the <componentname>_ prefix in general) - makes it easier to fork off a new chipset - makes it easier to diff against other chipsets - storing redundant information in filenames seems wrong Signed-off-by: <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/sis/sis966/ide.c')
-rw-r--r--src/southbridge/sis/sis966/ide.c196
1 files changed, 196 insertions, 0 deletions
diff --git a/src/southbridge/sis/sis966/ide.c b/src/southbridge/sis/sis966/ide.c
new file mode 100644
index 0000000000..c57be5ade7
--- /dev/null
+++ b/src/southbridge/sis/sis966/ide.c
@@ -0,0 +1,196 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Tyan Computer
+ * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
+ * Copyright (C) 2006,2007 AMD
+ * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
+ * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
+ * Written by Morgan Tsai <my_tsai@sis.com> for SiS.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <arch/io.h>
+#include "sis966.h"
+
+uint8_t SiS_SiS5513_init[49][3]={
+{0x04, 0xFF, 0x05},
+{0x0D, 0xFF, 0x80},
+{0x2C, 0xFF, 0x39},
+{0x2D, 0xFF, 0x10},
+{0x2E, 0xFF, 0x13},
+{0x2F, 0xFF, 0x55},
+{0x50, 0xFF, 0xA2},
+{0x51, 0xFF, 0x21},
+{0x53, 0xFF, 0x21},
+{0x54, 0xFF, 0x2A},
+{0x55, 0xFF, 0x96},
+{0x52, 0xFF, 0xA2},
+{0x56, 0xFF, 0x81},
+{0x57, 0xFF, 0xC0},
+{0x60, 0xFF, 0xFB},
+{0x61, 0xFF, 0xAA},
+{0x62, 0xFF, 0xFB},
+{0x63, 0xFF, 0xAA},
+{0x81, 0xFF, 0xB3},
+{0x82, 0xFF, 0x72},
+{0x83, 0xFF, 0x40},
+{0x85, 0xFF, 0xB3},
+{0x86, 0xFF, 0x72},
+{0x87, 0xFF, 0x40},
+{0x94, 0xFF, 0xC0},
+{0x95, 0xFF, 0x08},
+{0x96, 0xFF, 0xC0},
+{0x97, 0xFF, 0x08},
+{0x98, 0xFF, 0xCC},
+{0x99, 0xFF, 0x04},
+{0x9A, 0xFF, 0x0C},
+{0x9B, 0xFF, 0x14},
+{0xA0, 0xFF, 0x11},
+{0x57, 0xFF, 0xD0},
+
+{0xD8, 0xFE, 0x01}, // Com reset
+{0xC8, 0xFE, 0x01},
+{0xC4, 0xFF, 0xFF}, // Clear status
+{0xC5, 0xFF, 0xFF},
+{0xC6, 0xFF, 0xFF},
+{0xC7, 0xFF, 0xFF},
+{0xD4, 0xFF, 0xFF},
+{0xD5, 0xFF, 0xFF},
+{0xD6, 0xFF, 0xFF},
+{0xD7, 0xFF, 0xFF},
+
+
+{0x2C, 0xFF, 0x39}, // set subsystem ID
+{0x2D, 0xFF, 0x10},
+{0x2E, 0xFF, 0x13},
+{0x2F, 0xFF, 0x55},
+
+
+{0x00, 0x00, 0x00} //End of table
+};
+
+static void ide_init(struct device *dev)
+{
+ struct southbridge_sis_sis966_config *conf;
+ /* Enable ide devices so the linux ide driver will work */
+ uint32_t dword;
+ uint16_t word;
+ uint8_t byte;
+ conf = dev->chip_info;
+
+
+
+print_debug("IDE_INIT:---------->\n");
+
+
+//-------------- enable IDE (SiS5513) -------------------------
+{
+ uint8_t temp8;
+ int i=0;
+ while(SiS_SiS5513_init[i][0] != 0)
+ {
+ temp8 = pci_read_config8(dev, SiS_SiS5513_init[i][0]);
+ temp8 &= SiS_SiS5513_init[i][1];
+ temp8 |= SiS_SiS5513_init[i][2];
+ pci_write_config8(dev, SiS_SiS5513_init[i][0], temp8);
+ i++;
+ };
+}
+//-----------------------------------------------------------
+
+ word = pci_read_config16(dev, 0x50);
+ /* Ensure prefetch is disabled */
+ word &= ~((1 << 15) | (1 << 13));
+ if (conf->ide1_enable) {
+ /* Enable secondary ide interface */
+ word |= (1<<0);
+ printk(BIOS_DEBUG, "IDE1 \t");
+ }
+ if (conf->ide0_enable) {
+ /* Enable primary ide interface */
+ word |= (1<<1);
+ printk(BIOS_DEBUG, "IDE0\n");
+ }
+
+ word |= (1<<12);
+ word |= (1<<14);
+
+ pci_write_config16(dev, 0x50, word);
+
+
+ byte = 0x20 ; // Latency: 64-->32
+ pci_write_config8(dev, 0xd, byte);
+
+ dword = pci_read_config32(dev, 0xf8);
+ dword |= 12;
+ pci_write_config32(dev, 0xf8, dword);
+#if CONFIG_PCI_ROM_RUN == 1
+ pci_dev_init(dev);
+#endif
+
+#if DEBUG_IDE
+{
+ int i;
+
+ print_debug("****** IDE PCI config ******");
+ print_debug("\n 03020100 07060504 0B0A0908 0F0E0D0C");
+
+ for(i=0;i<0xff;i+=4){
+ if((i%16)==0){
+ print_debug("\n");
+ print_debug_hex8(i);
+ print_debug(": ");
+ }
+ print_debug_hex32(pci_read_config32(dev,i));
+ print_debug(" ");
+ }
+ print_debug("\n");
+}
+#endif
+print_debug("IDE_INIT:<----------\n");
+}
+
+static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+{
+ pci_write_config32(dev, 0x40,
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+static struct pci_operations lops_pci = {
+ .set_subsystem = lpci_set_subsystem,
+};
+
+static struct device_operations ide_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = ide_init,
+ .scan_bus = 0,
+// .enable = sis966_enable,
+ .ops_pci = &lops_pci,
+};
+
+static const struct pci_driver ide_driver __pci_driver = {
+ .ops = &ide_ops,
+ .vendor = PCI_VENDOR_ID_SIS,
+ .device = PCI_DEVICE_ID_SIS_SIS966_IDE,
+};
+