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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-24 00:26:26 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-31 03:41:41 +0000 |
commit | 4979ffc5cb267c7b0a5ad84c8bb9729e6b5613b1 (patch) | |
tree | c675c0b95a558ece1233c19d69d40f7441cfa500 /src/southbridge/sis/sis966/reset.c | |
parent | 1740230ace3aeede3a7ee5cadd1e17744cda07b3 (diff) | |
download | coreboot-4979ffc5cb267c7b0a5ad84c8bb9729e6b5613b1.tar.xz |
Remove southbridges after K8 board removals
Change-Id: Ib6935c026e2302b037fc82be64163f10bf775751
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/sis/sis966/reset.c')
-rw-r--r-- | src/southbridge/sis/sis966/reset.c | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/src/southbridge/sis/sis966/reset.c b/src/southbridge/sis/sis966/reset.c deleted file mode 100644 index 7be98d7a2f..0000000000 --- a/src/southbridge/sis/sis966/reset.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Tyan Computer - * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer. - * Copyright (C) 2006,2007 AMD - * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define __SIMPLE_DEVICE__ - -#include <arch/io.h> -#include <reset.h> - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void do_hard_reset(void) -{ - set_bios_reset(); - /* Try rebooting through port 0xcf9 */ - /* Actually it is not a real hard_reset --- it only reset coherent link table, but not reset link freq and width */ - outb((0 <<3)|(0<<2)|(1<<1), 0xcf9); - outb((0 <<3)|(1<<2)|(1<<1), 0xcf9); -} |