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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 13:40:31 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 13:40:31 +0000 |
| commit | 5692c5733633bfb8b23f1111de152eff0233b713 (patch) | |
| tree | d315817986c71d6710f75dceb87689b95e1bff53 /src/southbridge/sis/sis966/sis966_enable_usbdebug.c | |
| parent | d0835953506263b0d9218b62176693315f2ef2f3 (diff) | |
| download | coreboot-5692c5733633bfb8b23f1111de152eff0233b713.tar.xz | |
- move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1
- move EHCI_BAR and EHCI_DEBUG_OFFSET to Kconfig to be set by USB debug port enabled southbridges
- drop USB debug code includes from romstage.cs and use romstage-srcs in the build system instead
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/sis/sis966/sis966_enable_usbdebug.c')
| -rw-r--r-- | src/southbridge/sis/sis966/sis966_enable_usbdebug.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/southbridge/sis/sis966/sis966_enable_usbdebug.c b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c index 64aa7be277..a82e941b3a 100644 --- a/src/southbridge/sis/sis966/sis966_enable_usbdebug.c +++ b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c @@ -24,8 +24,11 @@ /* TODO: Check whether this actually works (might be copy-paste leftover). */ #include <stdint.h> +#include <arch/io.h> +#include <arch/romcc_io.h> #include <usbdebug.h> #include <device/pci_def.h> +#include "sis966.h" #if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE @@ -33,10 +36,6 @@ #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE #endif -#define EHCI_BAR 0xFEF00000 /* EHCI BAR address */ -#define EHCI_BAR_INDEX 0x10 -#define EHCI_DEBUG_OFFSET 0x98 - void set_debug_port(unsigned int port) { u32 dword; @@ -49,7 +48,7 @@ void set_debug_port(unsigned int port) pci_write_config32(dev, 0x74, dword); } -static void sis966_enable_usbdebug(unsigned int port) +void sis966_enable_usbdebug(unsigned int port) { device_t dev = PCI_DEV(0, SIS966_DEVN_BASE + 2, 1); /* USB EHCI */ @@ -57,7 +56,7 @@ static void sis966_enable_usbdebug(unsigned int port) set_debug_port(port); /* Set the EHCI BAR address. */ - pci_write_config32(dev, EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config32(dev, EHCI_BAR_INDEX, CONFIG_EHCI_BAR); /* Enable access to the EHCI memory space registers. */ pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); |