diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-21 18:36:06 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-08-28 18:26:07 +0200 |
commit | 70d79a454676b551f3bc2059217179e31905ee5c (patch) | |
tree | 1a27cd7c57a9d46d0c7d6e7aaeb361c73dfac872 /src/southbridge/sis/sis966 | |
parent | 03b040b95f1a16d07b98e15c1aeef77ec7a4eca9 (diff) | |
download | coreboot-70d79a454676b551f3bc2059217179e31905ee5c.tar.xz |
src/southbridge: Add required space before opening parenthesis '('
Change-Id: I43b9b86fd51dbdc50108026099c60238f3012cbe
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16290
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Diffstat (limited to 'src/southbridge/sis/sis966')
-rw-r--r-- | src/southbridge/sis/sis966/aza.c | 8 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/ide.c | 4 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/lpc.c | 2 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/nic.c | 26 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/sata.c | 4 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/usb.c | 4 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/usb2.c | 8 |
7 files changed, 28 insertions, 28 deletions
diff --git a/src/southbridge/sis/sis966/aza.c b/src/southbridge/sis/sis966/aza.c index e442ea25ef..dfd146d6ff 100644 --- a/src/southbridge/sis/sis966/aza.c +++ b/src/southbridge/sis/sis966/aza.c @@ -105,7 +105,7 @@ static int codec_detect(u8 *base) dword=send_verb(base,0x000F0000); // get codec VendorId and DeviceId - if(dword==0) { + if (dword==0) { printk(BIOS_DEBUG, "No codec!\n"); return 0; } @@ -184,7 +184,7 @@ static u32 verb_data[] = { static unsigned find_verb(u32 viddid, u32 **verb) { - if((viddid == 0x10ec0883) || (viddid == 0x10ec0882) || (viddid == 0x10ec0880)) return 0; + if ((viddid == 0x10ec0883) || (viddid == 0x10ec0882) || (viddid == 0x10ec0880)) return 0; *verb = (u32 *)verb_data; return sizeof(verb_data)/sizeof(u32); } @@ -268,8 +268,8 @@ static void aza_init(struct device *dev) printk(BIOS_DEBUG, "****** Azalia PCI config ******"); printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); - for(i=0;i<0xff;i+=4){ - if((i%16)==0){ + for (i=0;i<0xff;i+=4){ + if ((i%16)==0){ printk(BIOS_DEBUG, "\n%02x: ", i); } printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); diff --git a/src/southbridge/sis/sis966/ide.c b/src/southbridge/sis/sis966/ide.c index dcd11ac5ac..ebea6f3d70 100644 --- a/src/southbridge/sis/sis966/ide.c +++ b/src/southbridge/sis/sis966/ide.c @@ -148,8 +148,8 @@ printk(BIOS_DEBUG, "IDE_INIT:---------->\n"); printk(BIOS_DEBUG, "****** IDE PCI config ******"); printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); - for(i=0;i<0xff;i+=4){ - if((i%16)==0) + for (i=0;i<0xff;i+=4){ + if ((i%16)==0) printk(BIOS_DEBUG, "\n%02x: ", i); printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); } diff --git a/src/southbridge/sis/sis966/lpc.c b/src/southbridge/sis/sis966/lpc.c index 0a5adf0378..ef26745dbc 100644 --- a/src/southbridge/sis/sis966/lpc.c +++ b/src/southbridge/sis/sis966/lpc.c @@ -139,7 +139,7 @@ static void lpc_init(device_t dev) } else { byte |= ( 1 << 7); // Can not mask NMI from PCI-E and NMI_NOW } - if( byte != byte_old) { + if ( byte != byte_old) { outb(byte, 0x70); } diff --git a/src/southbridge/sis/sis966/nic.c b/src/southbridge/sis/sis966/nic.c index e48454ddd3..0d014aa815 100644 --- a/src/southbridge/sis/sis966/nic.c +++ b/src/southbridge/sis/sis966/nic.c @@ -73,7 +73,7 @@ static void readApcMacAddr(void) outl((inl(0xcfc) & 0xfffffffd),0xcfc ); // enable IO78/79h for APC Index/Data printk(BIOS_DEBUG, "MAC addr in APC = "); - for(i = 0x9 ; i <=0xe ; i++) + for (i = 0x9 ; i <=0xe ; i++) { printk(BIOS_DEBUG, "%2.2x",readApcByte(i)); } @@ -98,7 +98,7 @@ static void set_apc(struct device *dev) outl(0x80001048,0xcf8); outl((inl(0xcfc) & 0xfffffffd),0xcfc ); // enable IO78/79h for APC Index/Data - for(i = 0 ; i <3; i++) + for (i = 0 ; i <3; i++) { addr=0x9+2*i; writeApcByte(addr,(u8)(MacAddr[i]&0xFF)); @@ -142,11 +142,11 @@ static unsigned long ReadEEprom( struct device *dev, u8 *base, u32 Reg) mdelay(10); - for(i=0 ; i <= LoopNum; i++) + for (i=0 ; i <= LoopNum; i++) { ulValue=read32(base + 0x3c); - if(!(ulValue & 0x0080)) //BIT_7 + if (!(ulValue & 0x0080)) //BIT_7 break; mdelay(100); @@ -154,7 +154,7 @@ static unsigned long ReadEEprom( struct device *dev, u8 *base, u32 Reg) mdelay(50); - if(i==LoopNum) data=0x10000; + if (i==LoopNum) data=0x10000; else{ ulValue=read32(base + 0x3c); data = ((ulValue & 0xffff0000) >> 16); @@ -205,13 +205,13 @@ static int phy_detect(u8 *base,u16 *PhyAddr) //BOOL PHY_Detect() // Scan all PHY address(0 ~ 31) to find a valid PHY - for(PhyAddress = 0; PhyAddress < 32; PhyAddress++) + for (PhyAddress = 0; PhyAddress < 32; PhyAddress++) { usData=phy_read(base,PhyAddress,StatusReg); // Status register is a PHY's register(offset 01h) // Found a valid PHY - if((usData != 0x0) && (usData != 0xffff)) + if ((usData != 0x0) && (usData != 0xffff)) { bFoundPhy = TRUE; break; @@ -219,7 +219,7 @@ static int phy_detect(u8 *base,u16 *PhyAddr) //BOOL PHY_Detect() } - if(!bFoundPhy) + if (!bFoundPhy) { printk(BIOS_DEBUG, "PHY not found !!!!\n"); } @@ -260,7 +260,7 @@ static void nic_init(struct device *dev) res = find_resource(dev, 0x10); - if(!res) + if (!res) { printk(BIOS_DEBUG, "NIC Cannot find resource..\n"); return; @@ -268,7 +268,7 @@ static void nic_init(struct device *dev) base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "NIC base address %p\n",base); - if(!(val=phy_detect(base,&PhyAddr))) + if (!(val=phy_detect(base,&PhyAddr))) { printk(BIOS_DEBUG, "PHY detect fail !!!!\n"); return; @@ -276,7 +276,7 @@ static void nic_init(struct device *dev) ulValue=read32(base + 0x38L); // check EEPROM existing - if((ulValue & 0x0002)) + if ((ulValue & 0x0002)) { // read MAC address from EEPROM at first @@ -311,8 +311,8 @@ static void nic_init(struct device *dev) printk(BIOS_DEBUG, "****** NIC PCI config ******"); printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); - for(i=0;i<0xff;i+=4){ - if((i%16)==0) + for (i=0;i<0xff;i+=4){ + if ((i%16)==0) printk(BIOS_DEBUG, "\n%02x: ", i); printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); } diff --git a/src/southbridge/sis/sis966/sata.c b/src/southbridge/sis/sis966/sata.c index 197f4d22b9..eb69ab074a 100644 --- a/src/southbridge/sis/sis966/sata.c +++ b/src/southbridge/sis/sis966/sata.c @@ -150,8 +150,8 @@ for (i=0;i<10;i++){ printk(BIOS_DEBUG, "****** SATA PCI config ******"); printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); - for(i=0;i<0xff;i+=4){ - if((i%16)==0) + for (i=0;i<0xff;i+=4){ + if ((i%16)==0) printk(BIOS_DEBUG, "\n%02x: ", i); printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); } diff --git a/src/southbridge/sis/sis966/usb.c b/src/southbridge/sis/sis966/usb.c index 95f01d1265..64398e2661 100644 --- a/src/southbridge/sis/sis966/usb.c +++ b/src/southbridge/sis/sis966/usb.c @@ -75,8 +75,8 @@ static void usb_init(struct device *dev) printk(BIOS_DEBUG, "****** USB 1.1 PCI config ******"); printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); - for(i=0;i<0xff;i+=4){ - if((i%16)==0) + for (i=0;i<0xff;i+=4){ + if ((i%16)==0) printk(BIOS_DEBUG, "\n%02x: ", i); printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); } diff --git a/src/southbridge/sis/sis966/usb2.c b/src/southbridge/sis/sis966/usb2.c index 5bad6b39ef..8c3472335a 100644 --- a/src/southbridge/sis/sis966/usb2.c +++ b/src/southbridge/sis/sis966/usb2.c @@ -72,7 +72,7 @@ static void usb2_init(struct device *dev) //-------------- enable USB2.0 (SiS7002) ---------------------- i = 0; - while(SiS_SiS7002_init[i][0] != 0) + while (SiS_SiS7002_init[i][0] != 0) { temp8 = pci_read_config8(dev, SiS_SiS7002_init[i][0]); temp8 &= SiS_SiS7002_init[i][1]; @@ -82,7 +82,7 @@ static void usb2_init(struct device *dev) }; res = find_resource(dev, 0x10); - if(!res) + if (!res) return; base = res2mmio(res, 0, 0); @@ -94,8 +94,8 @@ static void usb2_init(struct device *dev) printk(BIOS_DEBUG, "****** USB 2.0 PCI config ******"); printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); - for(i=0;i<0xff;i+=4){ - if((i%16)==0) + for (i=0;i<0xff;i+=4){ + if ((i%16)==0) printk(BIOS_DEBUG, "\n%02x: ", i); printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); } |