diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-09-03 00:41:29 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-09 03:22:58 +0000 |
commit | 3953e3947d375c0552abc45d47a120aaee67d763 (patch) | |
tree | a5e5ca1f9c58ff5b89ff0fc4a32e054edbb6d1d1 /src/southbridge/sis | |
parent | 6c950da54ce2dff7b2874d774147572b95ae82f6 (diff) | |
download | coreboot-3953e3947d375c0552abc45d47a120aaee67d763.tar.xz |
x86: bootblock: remove linking and program flow from build system
The build system was previously determining the flow
and linking scripts bootblock code by the order of files
added to the bootblock_inc bootblock-y variables.Those
files were then concatenated together and built by a myriad of
make rules.
Now bootblock.S and bootblock.ld is added so that bootblock
can be built and linked using the default build rules.
CHIPSET_BOOTBLOCK_INCLUDE is introduced in order to allow the
chipset code to place include files in the path of the bootblock
program -- a replacement for the chipset_bootblock_inc
make variable.
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built vortex, rambi, and some asus boards.
Change-Id: Ida4571cbe6eed65e77ade98b8d9ad056353c53f9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11495
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/sis')
-rw-r--r-- | src/southbridge/sis/sis966/Kconfig | 12 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/Makefile.inc | 1 |
2 files changed, 10 insertions, 3 deletions
diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig index 390589ce0c..20f3bff2e3 100644 --- a/src/southbridge/sis/sis966/Kconfig +++ b/src/southbridge/sis/sis966/Kconfig @@ -4,10 +4,18 @@ config SOUTHBRIDGE_SIS_SIS966 select HAVE_USBDEBUG select HAVE_HARD_RESET +if SOUTHBRIDGE_SIS_SIS966 + config BOOTBLOCK_SOUTHBRIDGE_INIT string - default "southbridge/sis/sis966/bootblock.c" if SOUTHBRIDGE_SIS_SIS966 + default "southbridge/sis/sis966/bootblock.c" config EHCI_BAR hex - default 0xfef00000 if SOUTHBRIDGE_SIS_SIS966 + default 0xfef00000 + +config CHIPSET_BOOTBLOCK_INCLUDE + string + default "southbridge/sis/sis966/romstrap.inc" + +endif diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc index 71fff02685..e703e1fcba 100644 --- a/src/southbridge/sis/sis966/Makefile.inc +++ b/src/southbridge/sis/sis966/Makefile.inc @@ -15,7 +15,6 @@ ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c -chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc bootblock-y += romstrap.ld endif |